Fix Bug #1188

[jolinux]

change wrong position for triggermarker ^ output/bits.c,hex.c,ascii.c
New margin by channelname

[jolinux]

description
With a conf file certain parameters of the hardware drivers for libsigrok can be set.
The libconfig library is used

https://hyperrealm.github.io/libconfig/

function
It is possible for non-standard Sigrok installations

https://sigrok.org/wiki/Building#Installing_to_a_non-standard_directory_using_LD_LIBRARY_PATH

per working directory for the devices used create a parameter set. ! Multiinstallations !

The configfile is libsigrok.cfg in /home/user/.config/sigrok.

example:
###############################################################################
Devices =
{

// dreamsourcelab-logic
// samplerate 0=10Khz 1=20 2=50 3=100 4=200 5=500
// 6=1Mhz 7=2 8=5 9=10 10=20 11=25 12=50 13=100 14=200 15=400
// captureratio 0-100
// volt_threshold

dreamsourcelabdslogic = (
{ workdir = "/home/jo/sigrok_check_patch_threshold_pv_from_git_07_05_2018/bin";
samplerate = 8;
captureratio = 10;
volt_threshold = 2;
},
{ workdir = "";
samplerate = 2;
captureratio = 0;
volt_threshold = 2;
},
{ workdir = "default";
samplerate = 5;
captureratio = 0;
volt_threshold = 2;
}
);

// fx2lafw
// samplerate 0=20Khz 1=25 2=50 3=100 4=200 5=250 6=500
// 7=1Mhz 8=2 9=3 10=4 11=6 12=8 13=12 14=16 15=24
// captureratio 0-100

fx2lafw = (
{ workdir = "/home/jo/sigrok_check_patch_threshold_pv_from_git_07_05_2018";
samplerate = 10;
captureratio = 10;
},
{ workdir = "";
samplerate = 2;
captureratio = 10;
},
{ workdir = "default";
samplerate = 8;
captureratio = 1;
}
);

// saleae-logic16
// samplerate 0=500Khz
// 1=1Mhz 2=2 3=4 4=5 5=8 6=10
// 7=12500Khz
// 8=16Mhz 9=20 10=25 11=32 12=40 13=50 14=80 15=100
// captureratio 0-100

saleaelogic16 = (
{ workdir = "/home/jo/sigrok_check_patch_threshold_pv_from_git_07_05_2018";
samplerate = 10;
captureratio = 10;
},
{ workdir = "";
samplerate = 2;
captureratio = 10;
},
{ workdir = "default";
samplerate = 8;
captureratio = 1;
}
);

};
###############################################################################

With the comparison working directory (cwd), the modified driver retrieves its data record and assigns its variables. Because this is all the settings made in libsigrok can be used in all frontends.

Special "default": the directory comparison ends with "not found". If the data is set under default.

Overwrite parameters with frondend sigrok-cli / PV
value set by libconfig.
Libconfig overwrites default values ​​in the hardware driver.

implementation

• All necessary changes are encapsulated with ifdefine / endif. Default: no active
  for tests please change to active (unmark #define INIFILE api.c dreamsourcelab-dslogic,saleae-logic16,fx2lafw
• libconfig is in addition to install (Debian via apt-get).
• To compile include in the Makefile -lconfig.

Record lib in makefile
Location: libsigrok / Makefile
write
sed -i '/ ^ LIBSIGROK_LIBS / s / $ / -lconfig / g' libsigrok / Makefile
read back
sed -n '/ ^ LIBSIGROK_LIBS / p' libsigrok / Makefile

compile & tested
only Linux Debian

Open / Todo
Change the configure.ac

• add libconfig
• Control active / not active

[jolinux]

my libsigrok.conf
libsigrok.conf.zip

[jolinux]

Output of timestamps and real date at session start without debug level (printf). DSlogic driver with trigger timestamp output.

Triggerstamp I would like to have solved centrally at session.c . Unfortunately, processing at the intended locations depends on the debug level. So far only implemented in one driver.

This change can be used to log long-term post-trigger events (eg, troubleshooting triggers that rarely occur and have a time reference to other environmental behaviors). Or even with decoder support signal behavior can be logged completely time.

e.g .:
A DCF signal as input, which could also be live. Then a decoder timing (on falling edge).

./sigrok-cli -i ~ / Downloads / dcf77_1800s.sr --channels DATA -P timing: data = DATA: edge = rising | awk 'NR% 2' | awk '{if ($ 3 == "s") print $ 2, SUM + = $ 2; else if ($ 3 == "ms") print $ 2/1000, SUM + = ($ 2/1000); else if ($ 3 == "μs") print $ 2/1000000, SUM + = ($ 2/1000000)} '

Output: (Differnz to the previous edge: total time (timestamp) to the first edge))
0.764104 1803.14
0.76542 1803.91
0.770538 1804.68
0.770399 1805.45
0.770858 1806.22
0.770463 1806.99

[uwehermann]

The changes look promising, will test later on hardware, thanks! The struct contents did indeed change multiple times in the past (in the vendor software). The state we have right now in libsigrok was correct for DSView 0.95 but we now use the 0.97 firmware/bitstream so your fix is indeed correct.

Minor request: Please don't change the indentation, should still be 1 tab. "unsigned char" should remain "uint8_t" as well.

[uwehermann]

All other changes in this pull request seem unrelated to the DSLogic triggering issue (Bugzilla bug #1188) so those should be in extra branches and extra pull requests please.

For the "driver read parameters from conf file (user space)" changes there's no need to re-post them as extra branches / pull-request though, I'm afraid that one will not be merged upstream for many reasons, including additional dependencies and more importantly architectural issues. You're free to use that one locally if you want of course, but it's not desirable for upstream unfortunately.

[jolinux]

Unfortunately, I'm not clear what is taken over immediately and for what I have to open a branch

commit
9f9e874 -> Takeover after examination

920689c -> ???
actually belongs to the trigger because only after 9f9e874 this was detectable.

136ee78 conf, no branch, because no takeover

bb16e54 I set up a branch and set a new pull request

[uwehermann]

The #1188 fix is merged as 10481ef, thanks!