v0.14.0
SiliconCompiler 0.14.0 (2023-08-21)
Major:
- Reworked FPGA to allow for better handling of FPGA parameters in the schema.
- Added missing mechanical parameters to the schema and updating the signal interface naming for clarity.
- Stop execution upon node failures, instead of continuing with repeated failures.
Minor:
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Ensure ['option', 'nodisplay'] is set when the environment does not support graphics.
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Added error checking for ['option', 'steplist'] to match current flowgraph.
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Removed physyn step from asicflow.
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Fixed issue when running remote and the submitted files are not updated.
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Tools:
- OpenROAD - update default value for [..., 'var', 'grt_macro_extension'] to '0' to allow for better routing.
- verilator - reworked options selection to allow for better control of user selected tool options.
- yosys - added support for blackboxes in libraries via ['library', <lib>, 'output', 'blackbox', 'verilog'].