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arm neon: disable some FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
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while we figure out the situation in #1099

vcvth_s16_f16
vcvtah_s16_f16

vcvth_n_s32_f16
vcvth_n_s64_f16
vcvth_n_u32_f16
vcvth_n_u64_f16
vcvth_n_f16_s32
vcvth_n_f16_s64
vcvth_n_f16_u32
vcvth_n_f16_u64

vcvtmh_s16_f16
vcvtms_s32_f32
vcvtmd_s64_f64

vcvtnh_s16_f16

vcvtph_s16_f16
vcvtps_s32_f32
vcvtpd_s64_f64

Above removed due to test failures on real hardware

vcvt_s16_f16
vcvtq_s16_f16
vcvth_n_s16_f16
vcvt_n_s16_f16
vcvtq_n_s16_f16
(fallback implementations call vcvth_s16_f16)

vcvta_s16_f16
vcvtaq_s16_f16
(fallback implementations call vcvtah_s16_f16)

vcvtmq_s32_f32
vcvtm_s32_f32
(fallback implementations call vcvtms_s32_f32)

vcvtmq_s64_f64
vcvtm_s64_f64
(fallback implementations call vcvtmd_s64_f64)

vcvtnq_s16_f16
vcvtn_s16_f16
(fallback implementations call vcvtnh_s16_f16)

vcvtpq_s16_f16
vcvtp_s16_f16
(fallback implementations call vcvtph_s16_f16)

vcvtpq_s32_f32
vcvtp_s32_f32
(fallback implementations call vcvtps_s32_f32)

vcvtpq_s64_f64
vcvtp_s64_f64
(fallback implementations call vcvtpd_s64_f64)

vcvtmq_s16_f16
vcvtm_s16_f16
(fallback implementations call vcvtmh_s16_f16)
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mr-c committed Mar 20, 2024
1 parent 7ab3240 commit 339ffe4
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Showing 10 changed files with 188 additions and 41 deletions.
19 changes: 18 additions & 1 deletion simde/arm/neon/cvt.h
Original file line number Diff line number Diff line change
Expand Up @@ -139,6 +139,8 @@ simde_vcvt_f64_f32(simde_float32x2_t a) {
#define vcvt_f64_f32(a) simde_vcvt_f64_f32(a)
#endif

/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
int16_t
simde_vcvth_s16_f16(simde_float16_t a) {
Expand All @@ -164,6 +166,7 @@ simde_vcvth_s16_f16(simde_float16_t a) {
#undef vcvth_s16_f16
#define vcvth_s16_f16(a) simde_vcvth_s16_f16(a)
#endif
*/

SIMDE_FUNCTION_ATTRIBUTES
uint16_t
Expand Down Expand Up @@ -544,6 +547,8 @@ simde_vcvth_f16_u16(uint16_t a) {
#define vcvth_f16_u16(a) simde_vcvth_f16_u16(a)
#endif

/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
simde_int16x4_t
simde_vcvt_s16_f16(simde_float16x4_t a) {
Expand All @@ -569,6 +574,7 @@ simde_vcvt_s16_f16(simde_float16x4_t a) {
#undef vcvt_s16_f16
#define vcvt_s16_f16(a) simde_vcvt_s16_f16(a)
#endif
*/

SIMDE_FUNCTION_ATTRIBUTES
simde_int32x2_t
Expand Down Expand Up @@ -701,6 +707,8 @@ simde_vcvt_u64_f64(simde_float64x1_t a) {
#define vcvt_u64_f64(a) simde_vcvt_u64_f64(a)
#endif

/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
simde_int16x8_t
simde_vcvtq_s16_f16(simde_float16x8_t a) {
Expand All @@ -726,6 +734,7 @@ simde_vcvtq_s16_f16(simde_float16x8_t a) {
#undef vcvtq_s16_f16
#define vcvtq_s16_f16(a) simde_vcvtq_s16_f16(a)
#endif
*/

SIMDE_FUNCTION_ATTRIBUTES
simde_int32x4_t
Expand Down Expand Up @@ -1383,6 +1392,8 @@ simde_vcvtq_f64_u64(simde_uint64x2_t a) {
#define vcvtq_f64_u64(a) simde_vcvtq_f64_u64(a)
#endif

/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
int16_t
simde_vcvtah_s16_f16(simde_float16_t a) {
Expand All @@ -1408,6 +1419,7 @@ simde_vcvtah_s16_f16(simde_float16_t a) {
#undef vcvtah_s16_f16
#define vcvtah_s16_f16(a) simde_vcvtah_s16_f16(a)
#endif
*/

SIMDE_FUNCTION_ATTRIBUTES
uint16_t
Expand Down Expand Up @@ -1636,6 +1648,8 @@ simde_vcvtas_u32_f32(simde_float32 a) {
#define vcvtas_u32_f32(a) simde_vcvtas_u32_f32(a)
#endif

/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
simde_int16x4_t
simde_vcvta_s16_f16(simde_float16x4_t a) {
Expand All @@ -1657,6 +1671,7 @@ simde_vcvta_s16_f16(simde_float16x4_t a) {
#undef vcvta_s16_f16
#define vcvta_s16_f16(a) simde_vcvta_s16_f16(a)
#endif
*/

SIMDE_FUNCTION_ATTRIBUTES
simde_uint16x4_t
Expand Down Expand Up @@ -1746,6 +1761,8 @@ simde_vcvta_s32_f32(simde_float32x2_t a) {
#define vcvta_s32_f32(a) simde_vcvta_s32_f32(a)
#endif

/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
simde_int16x8_t
simde_vcvtaq_s16_f16(simde_float16x8_t a) {
Expand All @@ -1767,7 +1784,7 @@ simde_vcvtaq_s16_f16(simde_float16x8_t a) {
#undef vcvtaq_s16_f16
#define vcvtaq_s16_f16(a) simde_vcvtaq_s16_f16(a)
#endif

*/

SIMDE_FUNCTION_ATTRIBUTES
simde_uint16x8_t
Expand Down
18 changes: 18 additions & 0 deletions simde/arm/neon/cvt_n.h
Original file line number Diff line number Diff line change
Expand Up @@ -34,6 +34,8 @@ HEDLEY_DIAGNOSTIC_PUSH
SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
SIMDE_BEGIN_DECLS_

/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
int16_t
simde_vcvth_n_s16_f16(simde_float16_t a, const int n)
Expand Down Expand Up @@ -81,6 +83,7 @@ simde_vcvth_n_s64_f16(simde_float16_t a, const int n)
#undef vcvth_n_s64_f16
#define vcvth_n_s64_f16(a, n) simde_vcvth_n_s64_f16(a, n)
#endif
*/

SIMDE_FUNCTION_ATTRIBUTES
uint16_t
Expand All @@ -98,6 +101,8 @@ simde_vcvth_n_u16_f16(simde_float16_t a, const int n)
#define vcvth_n_u16_f16(a, n) simde_vcvth_n_u16_f16(a, n)
#endif

/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
uint32_t
simde_vcvth_n_u32_f16(simde_float16_t a, const int n)
Expand Down Expand Up @@ -129,6 +134,7 @@ simde_vcvth_n_u64_f16(simde_float16_t a, const int n)
#undef vcvth_n_u64_f16
#define vcvth_n_u64_f16(a, n) simde_vcvth_n_u64_f16(a, n)
#endif
*/

SIMDE_FUNCTION_ATTRIBUTES
simde_float16_t
Expand All @@ -146,6 +152,8 @@ simde_vcvth_n_f16_s16(int16_t a, const int n)
#define vcvth_n_f16_s16(a, n) simde_vcvth_n_f16_s16(a, n)
#endif

/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
simde_float16_t
simde_vcvth_n_f16_s32(int32_t a, const int n)
Expand Down Expand Up @@ -177,6 +185,7 @@ simde_vcvth_n_f16_s64(int64_t a, const int n)
#undef vcvth_n_f16_s64
#define vcvth_n_f16_s64(a, n) simde_vcvth_n_f16_s64(a, n)
#endif
*/

SIMDE_FUNCTION_ATTRIBUTES
simde_float16_t
Expand All @@ -194,6 +203,8 @@ simde_vcvth_n_f16_u16(uint16_t a, const int n)
#define vcvth_n_f16_u16(a, n) simde_vcvth_n_f16_u16(a, n)
#endif

/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
simde_float16_t
simde_vcvth_n_f16_u32(uint32_t a, const int n)
Expand Down Expand Up @@ -225,6 +236,7 @@ simde_vcvth_n_f16_u64(uint64_t a, const int n)
#undef vcvth_n_f16_u64
#define vcvth_n_f16_u64(a, n) simde_vcvth_n_f16_u64(a, n)
#endif
*/

SIMDE_FUNCTION_ATTRIBUTES
int32_t
Expand Down Expand Up @@ -340,6 +352,8 @@ simde_vcvtd_n_f64_u64(uint64_t a, const int n)
#define vcvtd_n_f64_u64(a, n) simde_vcvtd_n_f64_u64(a, n)
#endif

/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
simde_int16x4_t
simde_vcvt_n_s16_f16(simde_float16x4_t a, const int n)
Expand All @@ -363,6 +377,7 @@ simde_vcvt_n_s16_f16(simde_float16x4_t a, const int n)
#undef vcvt_n_s16_f16
#define vcvt_n_s16_f16(a, n) simde_vcvt_n_s16_f16((a), (n))
#endif
*/

SIMDE_FUNCTION_ATTRIBUTES
simde_int32x2_t
Expand Down Expand Up @@ -476,6 +491,8 @@ simde_vcvt_n_u64_f64(simde_float64x1_t a, const int n)
#define vcvt_n_u64_f64(a, n) simde_vcvt_n_u64_f64((a), (n))
#endif

/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
simde_int16x8_t
simde_vcvtq_n_s16_f16(simde_float16x8_t a, const int n)
Expand All @@ -499,6 +516,7 @@ simde_vcvtq_n_s16_f16(simde_float16x8_t a, const int n)
#undef vcvtq_n_s16_f16
#define vcvtq_n_s16_f16(a, n) simde_vcvtq_n_s16_f16((a), (n))
#endif
*/

SIMDE_FUNCTION_ATTRIBUTES
simde_int32x4_t
Expand Down
18 changes: 18 additions & 0 deletions simde/arm/neon/cvtm.h
Original file line number Diff line number Diff line change
Expand Up @@ -88,6 +88,8 @@ simde_vcvtmh_s32_f16(simde_float16_t a) {
#define vcvtmh_s32_f16(a) simde_vcvtmh_s32_f16(a)
#endif

/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
int16_t
simde_vcvtmh_s16_f16(simde_float16_t a) {
Expand All @@ -114,6 +116,7 @@ simde_vcvtmh_s16_f16(simde_float16_t a) {
#undef vcvtmh_s16_f16
#define vcvtmh_s16_f16(a) simde_vcvtmh_s16_f16(a)
#endif
*/

SIMDE_FUNCTION_ATTRIBUTES
uint64_t
Expand Down Expand Up @@ -196,6 +199,8 @@ simde_vcvtmh_u16_f16(simde_float16_t a) {
#define vcvtmh_u16_f16(a) simde_vcvtmh_u16_f16(a)
#endif

/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
int32_t
simde_vcvtms_s32_f32(simde_float32 a) {
Expand All @@ -219,6 +224,7 @@ simde_vcvtms_s32_f32(simde_float32 a) {
#undef vcvtms_s32_f32
#define vcvtms_s32_f32(a) simde_vcvtms_s32_f32(a)
#endif
*/

SIMDE_FUNCTION_ATTRIBUTES
uint32_t
Expand All @@ -244,6 +250,8 @@ simde_vcvtms_u32_f32(simde_float32 a) {
#define vcvtms_u32_f32(a) simde_vcvtms_u32_f32(a)
#endif

/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
int64_t
simde_vcvtmd_s64_f64(simde_float64 a) {
Expand All @@ -267,6 +275,7 @@ simde_vcvtmd_s64_f64(simde_float64 a) {
#undef vcvtmd_s64_f64
#define vcvtmd_s64_f64(a) simde_vcvtmd_s64_f64(a)
#endif
*/

SIMDE_FUNCTION_ATTRIBUTES
uint64_t
Expand All @@ -292,6 +301,8 @@ simde_vcvtmd_u64_f64(simde_float64 a) {
#define vcvtmd_u64_f64(a) simde_vcvtmd_u64_f64(a)
#endif

/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
simde_int16x8_t
simde_vcvtmq_s16_f16(simde_float16x8_t a) {
Expand Down Expand Up @@ -357,6 +368,7 @@ simde_vcvtmq_s64_f64(simde_float64x2_t a) {
#undef vcvtmq_s64_f64
#define vcvtmq_s64_f64(a) simde_vcvtmq_s64_f64(a)
#endif
*/

SIMDE_FUNCTION_ATTRIBUTES
simde_uint16x8_t
Expand Down Expand Up @@ -450,6 +462,8 @@ simde_vcvtmq_u64_f64(simde_float64x2_t a) {
#define vcvtmq_u64_f64(a) simde_vcvtmq_u64_f64(a)
#endif

/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
simde_int16x4_t
simde_vcvtm_s16_f16(simde_float16x4_t a) {
Expand All @@ -471,6 +485,7 @@ simde_vcvtm_s16_f16(simde_float16x4_t a) {
#undef vcvtm_s16_f16
#define vcvtm_s16_f16(a) simde_vcvtm_s16_f16(a)
#endif
*/

SIMDE_FUNCTION_ATTRIBUTES
simde_uint16x4_t
Expand Down Expand Up @@ -516,6 +531,8 @@ simde_vcvtm_u32_f32(simde_float32x2_t a) {
#define vcvtm_u32_f32(a) simde_vcvtm_u32_f32(a)
#endif

/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
simde_int32x2_t
simde_vcvtm_s32_f32(simde_float32x2_t a) {
Expand Down Expand Up @@ -559,6 +576,7 @@ simde_vcvtm_s64_f64(simde_float64x1_t a) {
#undef vcvtm_s64_f64
#define vcvtm_s64_f64(a) simde_vcvtm_s64_f64(a)
#endif
*/

SIMDE_FUNCTION_ATTRIBUTES
simde_uint64x1_t
Expand Down
6 changes: 6 additions & 0 deletions simde/arm/neon/cvtn.h
Original file line number Diff line number Diff line change
Expand Up @@ -153,6 +153,8 @@ simde_vcvtnh_s32_f16(simde_float16_t a) {
#define vcvtnh_s32_f16(a) simde_vcvtnh_s32_f16(a)
#endif

/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
int16_t
simde_vcvtnh_s16_f16(simde_float16_t a) {
Expand All @@ -177,6 +179,7 @@ simde_vcvtnh_s16_f16(simde_float16_t a) {
#undef vcvtnh_s16_f16
#define vcvtnh_s16_f16(a) simde_vcvtnh_s16_f16(a)
#endif
*/

SIMDE_FUNCTION_ATTRIBUTES
uint64_t
Expand Down Expand Up @@ -417,6 +420,8 @@ simde_vcvtnq_u64_f64(simde_float64x2_t a) {
#define vcvtnq_u64_f64(a) simde_vcvtnq_u64_f64(a)
#endif

/* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
* https://github.com/simd-everywhere/simde/issues/1099
SIMDE_FUNCTION_ATTRIBUTES
simde_int16x8_t
simde_vcvtnq_s16_f16(simde_float16x8_t a) {
Expand Down Expand Up @@ -460,6 +465,7 @@ simde_vcvtn_s16_f16(simde_float16x4_t a) {
#undef vcvtn_s16_f16
#define vcvtn_s16_f16(a) simde_vcvtn_s16_f16(a)
#endif
*/

SIMDE_FUNCTION_ATTRIBUTES
simde_uint16x8_t
Expand Down

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