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Initial Support for the RISC-V Vector Extension in ARM NEON (#1130)
* feat : add ci test for RISC-V Vector * feat : modify types.h for risc-v vector extension * feat : modify simde utilities for rvv * feat : modify load & store for risc-v v extension * feat : modify load & store for risc-v vector * feat : add and mul neon to rvv * feat : add rvv CI without zvfh * feat : add rvv implementation (mul_lane) * feat : add mulx_lane neon2rvv
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37 changes: 37 additions & 0 deletions
37
docker/cross-files/riscv64+rvv_vlen128_elen64-clang-17-ccache.cross
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[binaries] | ||
c = 'clang-17' | ||
cpp = 'clang++-17' | ||
ar = 'llvm-ar-17' | ||
strip = 'llvm-strip-17' | ||
objcopy = 'llvm-objcopy-17' | ||
ld = 'llvm-ld-17' | ||
exe_wrapper = ['qemu-riscv64', '-L', '/usr/riscv64-linux-gnu/', '-cpu', 'rv64,v=true,vlen=128,elen=64,vext_spec=v1.0'] | ||
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[properties] | ||
c_args = ['--target=riscv64-linux-gnu', | ||
'-isystem=/usr/riscv64-linux-gnu/include', | ||
'-march=rv64gcv1', | ||
'-menable-experimental-extensions', | ||
'-mrvv-vector-bits=128', | ||
'-Wextra', | ||
'-Werror', | ||
'-Wno-unsafe-buffer-usage'] | ||
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cpp_args = ['--target=riscv64-linux-gnu', | ||
'-isystem=/usr/riscv64-linux-gnu/include', | ||
'-march=rv64gcv1', | ||
'-menable-experimental-extensions', | ||
'-mrvv-vector-bits=128', | ||
'-Wextra', | ||
'-Werror', | ||
'-Wno-unsafe-buffer-usage'] | ||
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c_link_args = ['--target=riscv64-linux-gnu'] | ||
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cpp_link_args = ['--target=riscv64-linux-gnu'] | ||
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[host_machine] | ||
system = 'linux' | ||
cpu_family = 'riscv64' | ||
cpu = 'rv64,v=true,vlen=128,elen=64,vext_spec=v1.0' | ||
endian = 'little' |
37 changes: 37 additions & 0 deletions
37
docker/cross-files/riscv64+rvv_vlen128_elen64_zvfh-clang-17-ccache.cross
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,37 @@ | ||
[binaries] | ||
c = 'clang-17' | ||
cpp = 'clang++-17' | ||
ar = 'llvm-ar-17' | ||
strip = 'llvm-strip-17' | ||
objcopy = 'llvm-objcopy-17' | ||
ld = 'llvm-ld-17' | ||
exe_wrapper = ['qemu-riscv64', '-L', '/usr/riscv64-linux-gnu/', '-cpu', 'rv64,v=true,Zfh=true,x-zvfh=true,vlen=128,elen=64,vext_spec=v1.0'] | ||
|
||
[properties] | ||
c_args = ['--target=riscv64-linux-gnu', | ||
'-isystem=/usr/riscv64-linux-gnu/include', | ||
'-march=rv64gcv1_zfh_zvfh', | ||
'-menable-experimental-extensions', | ||
'-mrvv-vector-bits=128', | ||
'-Wextra', | ||
'-Werror', | ||
'-Wno-unsafe-buffer-usage'] | ||
|
||
cpp_args = ['--target=riscv64-linux-gnu', | ||
'-isystem=/usr/riscv64-linux-gnu/include', | ||
'-march=rv64gcv1_zfh_zvfh', | ||
'-menable-experimental-extensions', | ||
'-mrvv-vector-bits=128', | ||
'-Wextra', | ||
'-Werror', | ||
'-Wno-unsafe-buffer-usage'] | ||
|
||
c_link_args = ['--target=riscv64-linux-gnu'] | ||
|
||
cpp_link_args = ['--target=riscv64-linux-gnu'] | ||
|
||
[host_machine] | ||
system = 'linux' | ||
cpu_family = 'riscv64' | ||
cpu = 'rv64,v=true,Zfh=true,x-zvfh=true,vlen=128,elen=64,vext_spec=v1.0' | ||
endian = 'little' |
37 changes: 37 additions & 0 deletions
37
docker/cross-files/riscv64+rvv_vlen256_elen64-clang-17-ccache.cross
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,37 @@ | ||
[binaries] | ||
c = 'clang-17' | ||
cpp = 'clang++-17' | ||
ar = 'llvm-ar-17' | ||
strip = 'llvm-strip-17' | ||
objcopy = 'llvm-objcopy-17' | ||
ld = 'llvm-ld-17' | ||
exe_wrapper = ['qemu-riscv64', '-L', '/usr/riscv64-linux-gnu/', '-cpu', 'rv64,v=true,vlen=256,elen=64,vext_spec=v1.0'] | ||
|
||
[properties] | ||
c_args = ['--target=riscv64-linux-gnu', | ||
'-isystem=/usr/riscv64-linux-gnu/include', | ||
'-march=rv64gcv1', | ||
'-menable-experimental-extensions', | ||
'-mrvv-vector-bits=256', | ||
'-Wextra', | ||
'-Werror', | ||
'-Wno-unsafe-buffer-usage'] | ||
|
||
cpp_args = ['--target=riscv64-linux-gnu', | ||
'-isystem=/usr/riscv64-linux-gnu/include', | ||
'-march=rv64gcv1', | ||
'-menable-experimental-extensions', | ||
'-mrvv-vector-bits=256', | ||
'-Wextra', | ||
'-Werror', | ||
'-Wno-unsafe-buffer-usage'] | ||
|
||
c_link_args = ['--target=riscv64-linux-gnu'] | ||
|
||
cpp_link_args = ['--target=riscv64-linux-gnu'] | ||
|
||
[host_machine] | ||
system = 'linux' | ||
cpu_family = 'riscv64' | ||
cpu = 'rv64,v=true,vlen=256,elen=64,vext_spec=v1.0' | ||
endian = 'little' |
37 changes: 37 additions & 0 deletions
37
docker/cross-files/riscv64+rvv_vlen256_elen64_zvfh-clang-17-ccache.cross
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,37 @@ | ||
[binaries] | ||
c = 'clang-17' | ||
cpp = 'clang++-17' | ||
ar = 'llvm-ar-17' | ||
strip = 'llvm-strip-17' | ||
objcopy = 'llvm-objcopy-17' | ||
ld = 'llvm-ld-17' | ||
exe_wrapper = ['qemu-riscv64', '-L', '/usr/riscv64-linux-gnu/', '-cpu', 'rv64,v=true,Zfh=true,x-zvfh=true,vlen=256,elen=64,vext_spec=v1.0'] | ||
|
||
[properties] | ||
c_args = ['--target=riscv64-linux-gnu', | ||
'-isystem=/usr/riscv64-linux-gnu/include', | ||
'-march=rv64gcv1_zfh_zvfh', | ||
'-menable-experimental-extensions', | ||
'-mrvv-vector-bits=256', | ||
'-Wextra', | ||
'-Werror', | ||
'-Wno-unsafe-buffer-usage'] | ||
|
||
cpp_args = ['--target=riscv64-linux-gnu', | ||
'-isystem=/usr/riscv64-linux-gnu/include', | ||
'-march=rv64gcv1_zfh_zvfh', | ||
'-menable-experimental-extensions', | ||
'-mrvv-vector-bits=256', | ||
'-Wextra', | ||
'-Werror', | ||
'-Wno-unsafe-buffer-usage'] | ||
|
||
c_link_args = ['--target=riscv64-linux-gnu'] | ||
|
||
cpp_link_args = ['--target=riscv64-linux-gnu'] | ||
|
||
[host_machine] | ||
system = 'linux' | ||
cpu_family = 'riscv64' | ||
cpu = 'rv64,v=true,Zfh=true,x-zvfh=true,vlen=256,elen=64,vext_spec=v1.0' | ||
endian = 'little' |
37 changes: 37 additions & 0 deletions
37
docker/cross-files/riscv64+rvv_vlen512_elen64-clang-17-ccache.cross
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,37 @@ | ||
[binaries] | ||
c = 'clang-17' | ||
cpp = 'clang++-17' | ||
ar = 'llvm-ar-17' | ||
strip = 'llvm-strip-17' | ||
objcopy = 'llvm-objcopy-17' | ||
ld = 'llvm-ld-17' | ||
exe_wrapper = ['qemu-riscv64', '-L', '/usr/riscv64-linux-gnu/', '-cpu', 'rv64,v=true,vlen=512,elen=64,vext_spec=v1.0'] | ||
|
||
[properties] | ||
c_args = ['--target=riscv64-linux-gnu', | ||
'-isystem=/usr/riscv64-linux-gnu/include', | ||
'-march=rv64gcv1', | ||
'-menable-experimental-extensions', | ||
'-mrvv-vector-bits=512', | ||
'-Wextra', | ||
'-Werror', | ||
'-Wno-unsafe-buffer-usage'] | ||
|
||
cpp_args = ['--target=riscv64-linux-gnu', | ||
'-isystem=/usr/riscv64-linux-gnu/include', | ||
'-march=rv64gcv1', | ||
'-menable-experimental-extensions', | ||
'-mrvv-vector-bits=512', | ||
'-Wextra', | ||
'-Werror', | ||
'-Wno-unsafe-buffer-usage'] | ||
|
||
c_link_args = ['--target=riscv64-linux-gnu'] | ||
|
||
cpp_link_args = ['--target=riscv64-linux-gnu'] | ||
|
||
[host_machine] | ||
system = 'linux' | ||
cpu_family = 'riscv64' | ||
cpu = 'rv64,v=true,vlen=512,elen=64,vext_spec=v1.0' | ||
endian = 'little' |
37 changes: 37 additions & 0 deletions
37
docker/cross-files/riscv64+rvv_vlen512_elen64_zvfh-clang-17-ccache.cross
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,37 @@ | ||
[binaries] | ||
c = 'clang-17' | ||
cpp = 'clang++-17' | ||
ar = 'llvm-ar-17' | ||
strip = 'llvm-strip-17' | ||
objcopy = 'llvm-objcopy-17' | ||
ld = 'llvm-ld-17' | ||
exe_wrapper = ['qemu-riscv64', '-L', '/usr/riscv64-linux-gnu/', '-cpu', 'rv64,v=true,Zfh=true,x-zvfh=true,vlen=512,elen=64,vext_spec=v1.0'] | ||
|
||
[properties] | ||
c_args = ['--target=riscv64-linux-gnu', | ||
'-isystem=/usr/riscv64-linux-gnu/include', | ||
'-march=rv64gcv1_zfh_zvfh', | ||
'-menable-experimental-extensions', | ||
'-mrvv-vector-bits=512', | ||
'-Wextra', | ||
'-Werror', | ||
'-Wno-unsafe-buffer-usage'] | ||
|
||
cpp_args = ['--target=riscv64-linux-gnu', | ||
'-isystem=/usr/riscv64-linux-gnu/include', | ||
'-march=rv64gcv1_zfh_zvfh', | ||
'-menable-experimental-extensions', | ||
'-mrvv-vector-bits=512', | ||
'-Wextra', | ||
'-Werror', | ||
'-Wno-unsafe-buffer-usage'] | ||
|
||
c_link_args = ['--target=riscv64-linux-gnu'] | ||
|
||
cpp_link_args = ['--target=riscv64-linux-gnu'] | ||
|
||
[host_machine] | ||
system = 'linux' | ||
cpu_family = 'riscv64' | ||
cpu = 'rv64,v=true,Zfh=true,x-zvfh=true,vlen=512,elen=64,vext_spec=v1.0' | ||
endian = 'little' |
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