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Massive build fix for iOS, ngen_arm.S (ARM JIT core) now compiles! Th…
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…e next goal… fix OGLES2. Because that’s completely broken. Also, updated .gitignore to properly ignore iOS build artifacts.
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akemin-dayo committed May 20, 2014
1 parent 9e76688 commit 370fa02
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Showing 5 changed files with 59 additions and 347 deletions.
1 change: 1 addition & 0 deletions .gitignore
Expand Up @@ -15,6 +15,7 @@ shell/android/tools
# iOS/Xcode general stuff
.DS_Store
*/build/*
**/build/*
*.pbxuser
!default.pbxuser
*.mode1v3
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19 changes: 19 additions & 0 deletions core/rec-ARM/ngen_arm.S
Expand Up @@ -41,7 +41,11 @@ MOV R1, #1
B _Z8YUV_dataPjj

TAWriteSQ_vram: @vram write ..
#ifdef TARGET_IPHONE
bkpt #0
#else
bkpt
#endif
ubfx r0,r3,#5,#18 @ get vram offset
add r3,r1,#0x04000000 @ get vram ptr from r1, part 1
add r3,#512 @ get ram ptr from r1, part 2
Expand Down Expand Up @@ -157,13 +161,23 @@ arm_compilecode:
bl CompileCode
b arm_dispatch

#ifdef TARGET_IPHONE
Xarm_Reg: .word arm_Reg
XEntryPoints: .word EntryPoints
#endif

.global arm_mainloop
arm_mainloop: @(cntx,lookup_base,cycles)

push {r4,r5,r8,r9,lr}

#ifdef TARGET_IPHONE
ldr r8,Xarm_Reg @load cntx
ldr r4,XEntryPoints @load lookup base
#else
ldr r8,=arm_Reg @load cntx
ldr r4,=EntryPoints @load lookup base
#endif

ldr r5,[r8,#192] @load cycle count
add r5,r0 @add cycles for this timeslice
Expand All @@ -172,7 +186,12 @@ push {r4,r5,r8,r9,lr}

.global arm_dispatch
arm_dispatch:
#ifdef TARGET_IPHONE
ldrd r0,r1,[r8,#184] @load: Next PC, interrupt
#else
ldrd r0,[r8,#184] @load: Next PC, interrupt
#endif

ubfx r2,r0,#2,#19
cmp r1,#0
bne arm_dofiq
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7 changes: 6 additions & 1 deletion core/rend/gles/gles.h
@@ -1,9 +1,14 @@
#pragma once
#include "rend/rend.h"

#include <EGL/egl.h>
#ifdef TARGET_IPHONE //apple-specific ogles2 headers
#include <OpenGLES/ES2/gl.h>
#include <OpenGLES/ES2/glext.h>
#else
#include <EGL/egl.h
#include <GLES2/gl2.h>
#include <GLES2/gl2ext.h>
#endif

#ifndef GL_NV_draw_path
//IMGTEC GLES emulation
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