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@Kim-Dewelski
Kim-Dewelski committed Dec 17, 2023
1 parent db13bee commit a3c27a8
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Showing 2 changed files with 94 additions and 93 deletions.
50 changes: 25 additions & 25 deletions src/main.c
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Original file line number Diff line number Diff line change
Expand Up @@ -507,30 +507,30 @@ typedef struct {
} se_emu_id;
gui_state_t gui_state = {.update_font_atlas = true};

void se_draw_image(uint8_t *data, int im_width, int im_height, int x, int y, int render_width, int render_height, bool has_alpha);
void se_draw_lcd(uint8_t *data, int im_width, int im_height, int x, int y, int render_width, int render_height, float rotation, bool is_touch);
void se_load_rom_overlay(bool visible);
void sb_draw_onscreen_controller(sb_emu_state_t *state, int controller_h, int controller_y_pad, bool preview);
void se_reset_save_states();
void se_reset_cheats();
void se_set_new_controller(se_controller_state_t *cont, int index);
bool se_run_ar_cheat(const uint32_t *buffer, uint32_t size);
static void se_emscripten_flush_fs();
static uint32_t se_save_best_effort_state(se_core_state_t *state);
static bool se_load_best_effort_state(se_core_state_t *state, uint8_t *save_state_data, uint32_t size, uint32_t bess_offset);
static size_t se_get_core_size();
uint8_t *se_hcs_callback(const char *cmd, const char **params, uint64_t *result_size, const char **mime_type);
void se_open_file_browser(bool clicked, float x, float y, float w, float h, void (*file_open_fn)(const char *dir), const char **file_types, char *output_path);
void se_file_browser_accept(const char *path);
void se_run_all_ar_cheats();
void se_load_cheats(const char *filename);
void se_save_cheats(const char *filename);
void se_convert_cheat_code(char *text_code, int cheat_index);
static void se_reset_core();
static bool se_load_theme_from_file(const char *filename);
static bool se_draw_theme_region(int region, float x, float y, float w, float h);
static bool se_draw_theme_region_tint(int region, float x, float y, float w, float h, uint32_t tint);
static bool se_draw_theme_region_tint_partial(int region, float x, float y, float w, float h, float w_ratio, float h_ratio, uint32_t tint);
void se_draw_image(uint8_t *data, int im_width, int im_height, int x, int y, int render_width, int render_height, bool has_alpha);
void se_draw_lcd(uint8_t *data, int im_width, int im_height, int x, int y, int render_width, int render_height, float rotation, bool is_touch);
void se_load_rom_overlay(bool visible);
void sb_draw_onscreen_controller(sb_emu_state_t *state, int controller_h, int controller_y_pad, bool preview);
void se_reset_save_states();
void se_reset_cheats();
void se_set_new_controller(se_controller_state_t *cont, int index);
bool se_run_ar_cheat(const uint32_t *buffer, uint32_t size);
static void se_emscripten_flush_fs();
static uint32_t se_save_best_effort_state(se_core_state_t *state);
static bool se_load_best_effort_state(se_core_state_t *state, uint8_t *save_state_data, uint32_t size, uint32_t bess_offset);
static size_t se_get_core_size();
uint8_t *se_hcs_callback(const char *cmd, const char **params, uint64_t *result_size, const char **mime_type);
void se_open_file_browser(bool clicked, float x, float y, float w, float h, void (*file_open_fn)(const char *dir), const char **file_types, char *output_path);
void se_file_browser_accept(const char *path);
void se_run_all_ar_cheats();
void se_load_cheats(const char *filename);
void se_save_cheats(const char *filename);
void se_convert_cheat_code(char *text_code, int cheat_index);
static void se_reset_core();
static bool se_load_theme_from_file(const char *filename);
static bool se_draw_theme_region(int region, float x, float y, float w, float h);
static bool se_draw_theme_region_tint(int region, float x, float y, float w, float h, uint32_t tint);
static bool se_draw_theme_region_tint_partial(int region, float x, float y, float w, float h, float w_ratio, float h_ratio, uint32_t tint);

static const char *se_get_pref_path() {
#if defined(EMSCRIPTEN)
Expand Down Expand Up @@ -2747,7 +2747,7 @@ void nds9_mem_debugger() { se_draw_mem_debug_state("NDS7_MEM",
void nds7_cpu_debugger() { se_draw_arm_state("ARM7", &core.nds.arm7, &nds7_byte_read); }
void nds9_cpu_debugger() { se_draw_arm_state("ARM9", &core.nds.arm9, &nds9_byte_read); }

void nds_io_debugger() {
void nds_io_debugger() {
nds_t *nds = &core.nds;
for(int cpu = 0; cpu < 2; ++cpu) {
se_text(cpu ? ICON_FK_EXCHANGE " ARM9 IPC FIFO" : ICON_FK_EXCHANGE " ARM7 IPC FIFO");
Expand Down
137 changes: 69 additions & 68 deletions src/nds.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -2528,101 +2528,101 @@ static FORCE_INLINE uint32_t nds_apply_vram_mem_op(nds_t *nds, uint32_t address,
const static vram_bank_info_t bank_info[9][8] = {
{
//Bank A
{NDS_MEM_ARM7, 0, 0x06800000, 0x100000 - 1}, // MST 0 6800000h-681FFFFh
{NDS_MEM_ARM7, 1, 0x06000000, 0x80000 - 1}, // MST 1 6000000h+(20000h*OFS)
{NDS_MEM_ARM7, 6, 0x06400000, 0x40000 - 1}, // MST 2 6400000h+(20000h*OFS.0) ;OFS.1 must be zero
{NDS_MEM_ARM7 | NDS_MEM_ARM9, 6, NDS_VRAM_TEX_SLOT0}, // MST 3 Slot OFS(0-3) ;(Slot2-3: Texture, or Rear-plane)
{NDS_MEM_ARM7, 0, 0x06800000, 0x100000 - 1}, // MST 4
{NDS_MEM_ARM7, 1, 0x06000000, 0x80000 - 1}, // MST 5
{NDS_MEM_ARM7, 6, 0x06400000, 0x40000 - 1}, // MST 6
{NDS_MEM_ARM7 | NDS_MEM_ARM9, 6, NDS_VRAM_TEX_SLOT0}, // MST 7
{NDS_MEM_ARM7, 0, 0x06800000, 0x100000 - 1}, // MST 0 6800000h-681FFFFh
{NDS_MEM_ARM7, 1, 0x06000000, 0x80000 - 1}, // MST 1 6000000h+(20000h*OFS)
{NDS_MEM_ARM7, 6, 0x06400000, 0x40000 - 1}, // MST 2 6400000h+(20000h*OFS.0) ;OFS.1 must be zero
{NDS_MEM_ARM7 | NDS_MEM_ARM9, 6, NDS_VRAM_TEX_SLOT0}, // MST 3 Slot OFS(0-3) ;(Slot2-3: Texture, or Rear-plane)
{NDS_MEM_ARM7, 0, 0x06800000, 0x100000 - 1}, // MST 4
{NDS_MEM_ARM7, 1, 0x06000000, 0x80000 - 1}, // MST 5
{NDS_MEM_ARM7, 6, 0x06400000, 0x40000 - 1}, // MST 6
{NDS_MEM_ARM7 | NDS_MEM_ARM9, 6, NDS_VRAM_TEX_SLOT0}, // MST 7
},
{
//Bank B
{NDS_MEM_ARM7, 0, 0x06820000, 0x100000 - 1}, // MST 0 6820000h-683FFFFh
{NDS_MEM_ARM7, 1, 0x06000000, 0x80000 - 1}, // MST 1 6000000h+(20000h*OFS)
{NDS_MEM_ARM7, 6, 0x06400000, 0x40000 - 1}, // MST 2 6400000h+(20000h*OFS.0) ;OFS.1 must be zero
{NDS_MEM_ARM7 | NDS_MEM_ARM9, 6, NDS_VRAM_TEX_SLOT0}, // MST 3 Slot OFS(0-3) ;(Slot2-3: Texture, or Rear-plane)
{NDS_MEM_ARM7, 0, 0x06820000, 0x100000 - 1}, // MST 4
{NDS_MEM_ARM7, 1, 0x06000000, 0x80000 - 1}, // MST 5
{NDS_MEM_ARM7, 6, 0x06400000, 0x40000 - 1}, // MST 6
{NDS_MEM_ARM7, 0, 0x06820000, 0x100000 - 1}, // MST 0 6820000h-683FFFFh
{NDS_MEM_ARM7, 1, 0x06000000, 0x80000 - 1}, // MST 1 6000000h+(20000h*OFS)
{NDS_MEM_ARM7, 6, 0x06400000, 0x40000 - 1}, // MST 2 6400000h+(20000h*OFS.0) ;OFS.1 must be zero
{NDS_MEM_ARM7 | NDS_MEM_ARM9, 6, NDS_VRAM_TEX_SLOT0}, // MST 3 Slot OFS(0-3) ;(Slot2-3: Texture, or Rear-plane)
{NDS_MEM_ARM7, 0, 0x06820000, 0x100000 - 1}, // MST 4
{NDS_MEM_ARM7, 1, 0x06000000, 0x80000 - 1}, // MST 5
{NDS_MEM_ARM7, 6, 0x06400000, 0x40000 - 1}, // MST 6
{NDS_MEM_ARM7 | NDS_MEM_ARM9, 6, NDS_VRAM_TEX_SLOT0}, // MST 7
},
{
//Bank C
{NDS_MEM_ARM7, 0, 0x06840000, 0x100000 - 1}, // MST 0 6840000h-685FFFFh
{NDS_MEM_ARM7, 1, 0x06000000, 0x80000 - 1}, // MST 1 6000000h+(20000h*OFS)
{NDS_MEM_ARM9 | NDS_MEM_PPU, 6, 0x06000000, 0x80000 - 1}, // MST 2 6000000h+(20000h*OFS.0) ;OFS.1 must be zero
{NDS_MEM_ARM7 | NDS_MEM_ARM9, 6, NDS_VRAM_TEX_SLOT0}, // MST 3 Slot OFS(0-3) ;(Slot2-3: Texture, or Rear-plane)
{NDS_MEM_ARM7, 0, 0x06200000, 0x20000 - 1}, // MST 4 6200000h
{0xffffffff, 0, 0x0}, // MST 5 INVALID
{0xffffffff, 0, 0x0}, // MST 6 INVALID
{NDS_MEM_ARM7, 0, 0x06840000, 0x100000 - 1}, // MST 0 6840000h-685FFFFh
{NDS_MEM_ARM7, 1, 0x06000000, 0x80000 - 1}, // MST 1 6000000h+(20000h*OFS)
{NDS_MEM_ARM9 | NDS_MEM_PPU, 6, 0x06000000, 0x80000 - 1}, // MST 2 6000000h+(20000h*OFS.0) ;OFS.1 must be zero
{NDS_MEM_ARM7 | NDS_MEM_ARM9, 6, NDS_VRAM_TEX_SLOT0}, // MST 3 Slot OFS(0-3) ;(Slot2-3: Texture, or Rear-plane)
{NDS_MEM_ARM7, 0, 0x06200000, 0x20000 - 1}, // MST 4 6200000h
{0xffffffff, 0, 0x0}, // MST 5 INVALID
{0xffffffff, 0, 0x0}, // MST 6 INVALID
{0xffffffff, 0, 0x0}, // MST 7 INVALID
},
{
//Bank D
{NDS_MEM_ARM7, 0, 0x06860000, 0x100000 - 1}, // MST 0 6860000h-687FFFFh
{NDS_MEM_ARM7, 1, 0x06000000, 0x80000 - 1}, // MST 1 6000000h+(20000h*OFS)
{NDS_MEM_ARM9 | NDS_MEM_PPU, 6, 0x06000000, 0x80000 - 1}, // MST 2 6000000h+(20000h*OFS.0) ;OFS.1 must be zero
{NDS_MEM_ARM7 | NDS_MEM_ARM9, 6, NDS_VRAM_TEX_SLOT0}, // MST 3 Slot OFS(0-3) ;(Slot2-3: Texture, or Rear-plane)
{NDS_MEM_ARM7, 0, 0x06600000, 0x20000 - 1}, // MST 4 6600000h
{0xffffffff, 0, 0x0}, // MST 5 INVALID
{0xffffffff, 0, 0x0}, // MST 6 INVALID
{NDS_MEM_ARM7, 0, 0x06860000, 0x100000 - 1}, // MST 0 6860000h-687FFFFh
{NDS_MEM_ARM7, 1, 0x06000000, 0x80000 - 1}, // MST 1 6000000h+(20000h*OFS)
{NDS_MEM_ARM9 | NDS_MEM_PPU, 6, 0x06000000, 0x80000 - 1}, // MST 2 6000000h+(20000h*OFS.0) ;OFS.1 must be zero
{NDS_MEM_ARM7 | NDS_MEM_ARM9, 6, NDS_VRAM_TEX_SLOT0}, // MST 3 Slot OFS(0-3) ;(Slot2-3: Texture, or Rear-plane)
{NDS_MEM_ARM7, 0, 0x06600000, 0x20000 - 1}, // MST 4 6600000h
{0xffffffff, 0, 0x0}, // MST 5 INVALID
{0xffffffff, 0, 0x0}, // MST 6 INVALID
{0xffffffff, 0, 0x0}, // MST 7 INVALID
},
{
//Bank E
{NDS_MEM_ARM7, 0, 0x06880000, 0x100000 - 1}, // MST 0 6880000h-688FFFFh
{NDS_MEM_ARM7, 0, 0x06000000, 0x80000 - 1}, // MST 1 6000000h
{NDS_MEM_ARM7, 0, 0x06400000, 0x40000 - 1}, // MST 2 6400000h
{NDS_MEM_ARM7 | NDS_MEM_ARM9, 0, NDS_VRAM_TEX_PAL_SLOT0}, // MST 3 Slots 0-3;OFS=don't care
{NDS_MEM_ARM7 | NDS_MEM_ARM9, 0, NDS_VRAM_BGA_SLOT0}, // MST 4 (64K Slot 0-3 ;only lower 32K used)
{0xffffffff, 0, 0x0}, // MST 5 INVALID
{0xffffffff, 0, 0x0}, // MST 6 INVALID
{NDS_MEM_ARM7, 0, 0x06880000, 0x100000 - 1}, // MST 0 6880000h-688FFFFh
{NDS_MEM_ARM7, 0, 0x06000000, 0x80000 - 1}, // MST 1 6000000h
{NDS_MEM_ARM7, 0, 0x06400000, 0x40000 - 1}, // MST 2 6400000h
{NDS_MEM_ARM7 | NDS_MEM_ARM9, 0, NDS_VRAM_TEX_PAL_SLOT0}, // MST 3 Slots 0-3;OFS=don't care
{NDS_MEM_ARM7 | NDS_MEM_ARM9, 0, NDS_VRAM_BGA_SLOT0}, // MST 4 (64K Slot 0-3 ;only lower 32K used)
{0xffffffff, 0, 0x0}, // MST 5 INVALID
{0xffffffff, 0, 0x0}, // MST 6 INVALID
{0xffffffff, 0, 0x0}, // MST 7 INVALID
},
{
//Bank F
{NDS_MEM_ARM7, 0, 0x06890000, 0x100000 - 1}, // MST 0 6890000h-6893FFFh
{NDS_MEM_ARM7, 2, 0x06000000, 0x80000 - 1}, // MST 1 6000000h+(4000h*OFS.0)+(10000h*OFS.1)
{NDS_MEM_ARM7, 2, 0x06400000, 0x40000 - 1}, // MST 2 6400000h+(4000h*OFS.0)+(10000h*OFS.1)
{NDS_MEM_ARM7 | NDS_MEM_ARM9, 9, NDS_VRAM_TEX_PAL_SLOT0}, // MST 3 Slot (OFS.0*1)+(OFS.1*4) ;ie. Slot 0, 1, 4, or 5
{NDS_MEM_ARM7 | NDS_MEM_ARM9, 8, NDS_VRAM_BGA_SLOT0}, // MST 4 0..1 Slot 0-1 (OFS=0), Slot 2-3 (OFS=1)
{NDS_MEM_ARM7 | NDS_MEM_ARM9, 0, NDS_VRAM_OBJA_SLOT0}, // MST 5 Slot 0 ;16K each (only lower 8K used)
{0xffffffff, 0, 0x0}, // MST 6 INVALID
{NDS_MEM_ARM7, 0, 0x06890000, 0x100000 - 1}, // MST 0 6890000h-6893FFFh
{NDS_MEM_ARM7, 2, 0x06000000, 0x80000 - 1}, // MST 1 6000000h+(4000h*OFS.0)+(10000h*OFS.1)
{NDS_MEM_ARM7, 2, 0x06400000, 0x40000 - 1}, // MST 2 6400000h+(4000h*OFS.0)+(10000h*OFS.1)
{NDS_MEM_ARM7 | NDS_MEM_ARM9, 9, NDS_VRAM_TEX_PAL_SLOT0}, // MST 3 Slot (OFS.0*1)+(OFS.1*4) ;ie. Slot 0, 1, 4, or 5
{NDS_MEM_ARM7 | NDS_MEM_ARM9, 8, NDS_VRAM_BGA_SLOT0}, // MST 4 0..1 Slot 0-1 (OFS=0), Slot 2-3 (OFS=1)
{NDS_MEM_ARM7 | NDS_MEM_ARM9, 0, NDS_VRAM_OBJA_SLOT0}, // MST 5 Slot 0 ;16K each (only lower 8K used)
{0xffffffff, 0, 0x0}, // MST 6 INVALID
{0xffffffff, 0, 0x0}, // MST 7 INVALID
},
{
//Bank G
{NDS_MEM_ARM7, 0, 0x06894000, 0x100000 - 1}, // MST 0 6894000h-6897FFFh
{NDS_MEM_ARM7, 2, 0x06000000, 0x80000 - 1}, // MST 1 6000000h+(4000h*OFS.0)+(10000h*OFS.1)
{NDS_MEM_ARM7, 2, 0x06400000, 0x40000 - 1}, // MST 2 6400000h+(4000h*OFS.0)+(10000h*OFS.1)
{NDS_MEM_ARM7 | NDS_MEM_ARM9, 9, NDS_VRAM_TEX_PAL_SLOT0}, // MST3 Slot (OFS.0*1)+(OFS.1*4) ;ie. Slot 0, 1, 4, or 5
{NDS_MEM_ARM7 | NDS_MEM_ARM9, 8, NDS_VRAM_BGA_SLOT0}, // MST 4 0..1 Slot 0-1 (OFS=0), Slot 2-3 (OFS=1)
{NDS_MEM_ARM7 | NDS_MEM_ARM9, 0, NDS_VRAM_OBJA_SLOT0}, // MST 5 Slot 0 ;16K each (only lower 8K used)
{0xffffffff, 0, 0x0}, // MST 6 INVALID
{NDS_MEM_ARM7, 0, 0x06894000, 0x100000 - 1}, // MST 0 6894000h-6897FFFh
{NDS_MEM_ARM7, 2, 0x06000000, 0x80000 - 1}, // MST 1 6000000h+(4000h*OFS.0)+(10000h*OFS.1)
{NDS_MEM_ARM7, 2, 0x06400000, 0x40000 - 1}, // MST 2 6400000h+(4000h*OFS.0)+(10000h*OFS.1)
{NDS_MEM_ARM7 | NDS_MEM_ARM9, 9, NDS_VRAM_TEX_PAL_SLOT0}, // MST3 Slot (OFS.0*1)+(OFS.1*4) ;ie. Slot 0, 1, 4, or 5
{NDS_MEM_ARM7 | NDS_MEM_ARM9, 8, NDS_VRAM_BGA_SLOT0}, // MST 4 0..1 Slot 0-1 (OFS=0), Slot 2-3 (OFS=1)
{NDS_MEM_ARM7 | NDS_MEM_ARM9, 0, NDS_VRAM_OBJA_SLOT0}, // MST 5 Slot 0 ;16K each (only lower 8K used)
{0xffffffff, 0, 0x0}, // MST 6 INVALID
{0xffffffff, 0, 0x0}, // MST 7 INVALID
},
{
//Bank H
{NDS_MEM_ARM7, 0, 0x06898000, 0x100000 - 1}, // MST 0 6898000h-689FFFFh
{NDS_MEM_ARM7, 0, 0x06200000, 0x10000 - 1}, // MST 1 6200000h
{NDS_MEM_ARM7 | NDS_MEM_ARM9, 0, NDS_VRAM_BGB_SLOT0}, // MST 2 Slot 0-3
{0xffffffff, 0, 0x0}, // MST 3 INVALID
{NDS_MEM_ARM7, 0, 0x06898000, 0x100000 - 1}, // MST 4 6898000h-689FFFFh
{NDS_MEM_ARM7, 0, 0x06200000, 0x10000 - 1}, // MST 5 6200000h
{NDS_MEM_ARM7 | NDS_MEM_ARM9, 0, NDS_VRAM_BGB_SLOT0}, // MST 6 Slot 0-3
{NDS_MEM_ARM7, 0, 0x06898000, 0x100000 - 1}, // MST 0 6898000h-689FFFFh
{NDS_MEM_ARM7, 0, 0x06200000, 0x10000 - 1}, // MST 1 6200000h
{NDS_MEM_ARM7 | NDS_MEM_ARM9, 0, NDS_VRAM_BGB_SLOT0}, // MST 2 Slot 0-3
{0xffffffff, 0, 0x0}, // MST 3 INVALID
{NDS_MEM_ARM7, 0, 0x06898000, 0x100000 - 1}, // MST 4 6898000h-689FFFFh
{NDS_MEM_ARM7, 0, 0x06200000, 0x10000 - 1}, // MST 5 6200000h
{NDS_MEM_ARM7 | NDS_MEM_ARM9, 0, NDS_VRAM_BGB_SLOT0}, // MST 6 Slot 0-3
{0xffffffff, 0, 0x0}, // MST 7 INVALID
},
{
//Bank I
{NDS_MEM_ARM7, 0, 0x068A0000, 0x100000 - 1}, // MST 0 68A0000h-68A3FFFh
{NDS_MEM_ARM7, 0, 0x06208000, 0x10000 - 1}, // MST 1 6208000h
{NDS_MEM_ARM7, 0, 0x06600000, 0x4000 - 1}, // MST 2 6600000h
{NDS_MEM_ARM7 | NDS_MEM_ARM9, 0, NDS_VRAM_OBJB_SLOT0}, // MST 3 Slot 0 ;16K each (only lower 8K used)
{NDS_MEM_ARM7, 0, 0x068A0000, 0x100000 - 1}, // MST 4 68A0000h-68A3FFFh
{NDS_MEM_ARM7, 0, 0x06208000, 0x10000 - 1}, // MST 5 6208000h
{NDS_MEM_ARM7, 0, 0x06600000, 0x4000 - 1}, // MST 6 6600000h
{NDS_MEM_ARM7, 0, 0x068A0000, 0x100000 - 1}, // MST 0 68A0000h-68A3FFFh
{NDS_MEM_ARM7, 0, 0x06208000, 0x10000 - 1}, // MST 1 6208000h
{NDS_MEM_ARM7, 0, 0x06600000, 0x4000 - 1}, // MST 2 6600000h
{NDS_MEM_ARM7 | NDS_MEM_ARM9, 0, NDS_VRAM_OBJB_SLOT0}, // MST 3 Slot 0 ;16K each (only lower 8K used)
{NDS_MEM_ARM7, 0, 0x068A0000, 0x100000 - 1}, // MST 4 68A0000h-68A3FFFh
{NDS_MEM_ARM7, 0, 0x06208000, 0x10000 - 1}, // MST 5 6208000h
{NDS_MEM_ARM7, 0, 0x06600000, 0x4000 - 1}, // MST 6 6600000h
{NDS_MEM_ARM7 | NDS_MEM_ARM9, 0, NDS_VRAM_OBJB_SLOT0}, // MST 7 Slot 0 ;16K each (only lower 8K used)
}
};
Expand Down Expand Up @@ -5981,10 +5981,11 @@ static FORCE_INLINE void nds_tick_gx(nds_t *nds) {
nds->gpu.curr_tex_coord[0] = SB_BFE(p[0], 0, 16);
nds->gpu.curr_tex_coord[1] = SB_BFE(p[0], 16, 16);
break;
case 0x23: /*VTX_16*/ nds_gpu_process_vertex(nds, SB_BFE(p[0], 0, 16),
SB_BFE(p[0], 16, 16),
SB_BFE(p[1], 0, 16));
break;
case 0x23: /*VTX_16*/
nds_gpu_process_vertex(nds, SB_BFE(p[0], 0, 16),
SB_BFE(p[0], 16, 16),
SB_BFE(p[1], 0, 16));
break;

case 0x24: /*VTX_10*/
nds_gpu_process_vertex(nds, ((int16_t)SB_BFE(p[0], 0, 10) << 6),
Expand Down

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