pinctrl

Signed-off-by: Samuel Holland <samuel@sholland.org>

arch/arm/Kconfig

@@ -1007,6 +1007,7 @@ config ARCH_SUNXI
 	select OF_BOARD_SETUP
 	select OF_CONTROL
 	select OF_SEPARATE
+	select PINCTRL
 	select SPECIFY_CONSOLE_INDEX
 	select SPL_STACK_R if SPL
 	select SPL_SYS_MALLOC_SIMPLE if SPL

board/sunxi/board.c

@@ -302,17 +302,6 @@ int board_init(void)
 	i2c_init_board();
 #endif
 
-#ifdef CONFIG_DM_MMC
-	/*
-	 * Temporary workaround for enabling MMC clocks until a sunxi DM
-	 * pinctrl driver lands.
-	 */
-	mmc_pinmux_setup(CONFIG_MMC_SUNXI_SLOT);
-#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
-	mmc_pinmux_setup(CONFIG_MMC_SUNXI_SLOT_EXTRA);
-#endif
-#endif	/* CONFIG_DM_MMC */
-
 	/* Uses dm gpio code so do this here and not in i2c_init_board() */
 	return soft_i2c_board_init();
 }

drivers/core/lists.c

@@ -8,6 +8,7 @@
 
 #define LOG_CATEGORY LOGC_DM
 
+#define DEBUG
 #include <common.h>
 #include <errno.h>
 #include <log.h>

drivers/gpio/sunxi_gpio.c

@@ -272,6 +272,22 @@ static int gpio_sunxi_probe(struct udevice *dev)
 	return 0;
 }
 
+int gpio_sunxi_bind_one(struct udevice *parent, void *regs, int bank)
+{
+	struct sunxi_gpio_plat *plat;
+
+	plat = calloc(1, sizeof(*plat));
+	if (!plat)
+		return -ENOMEM;
+	plat->regs = regs;
+	plat->bank_name = gpio_bank_name(bank);
+	plat->gpio_count = SUNXI_GPIOS_PER_BANK;
+
+	return device_bind(parent, DM_DRIVER_GET(gpio_sunxi), plat->bank_name,
+			   plat, dev_ofnode(parent), NULL);
+}
+
+#if !defined(CONFIG_PINCTRL_SUNXI)
 struct sunxi_gpio_soc_data {
 	int start;
 	int no_banks;
@@ -295,18 +311,8 @@ static int gpio_sunxi_bind(struct udevice *parent)
 
 	ctlr = dev_read_addr_ptr(parent);
 	for (bank = 0; bank < soc_data->no_banks; bank++) {
-		struct sunxi_gpio_plat *plat;
-		struct udevice *dev;
-
-		plat = calloc(1, sizeof(*plat));
-		if (!plat)
-			return -ENOMEM;
-		plat->regs = &ctlr->gpio_bank[bank];
-		plat->bank_name = gpio_bank_name(soc_data->start + bank);
-		plat->gpio_count = SUNXI_GPIOS_PER_BANK;
-
-		ret = device_bind(parent, parent->driver, plat->bank_name, plat,
-				  dev_ofnode(parent), &dev);
+		ret = gpio_sunxi_bind_one(parent, &ctlr->gpio_bank[bank],
+					  soc_data->start + bank);
 		if (ret)
 			return ret;
 	}
@@ -366,13 +372,16 @@ static const struct udevice_id sunxi_gpio_ids[] = {
 	ID("allwinner,sun50i-h616-r-pinctrl",	l_1),
 	{ }
 };
+#endif
 
 U_BOOT_DRIVER(gpio_sunxi) = {
 	.name	= "gpio_sunxi",
 	.id	= UCLASS_GPIO,
 	.ops	= &gpio_sunxi_ops,
+#if !defined(CONFIG_PINCTRL_SUNXI)
 	.of_match = sunxi_gpio_ids,
 	.bind	= gpio_sunxi_bind,
+#endif
 	.probe	= gpio_sunxi_probe,
 };
 #endif /* DM_GPIO */

drivers/mmc/sunxi_mmc.c

@@ -9,6 +9,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <dm/pinctrl.h>
 #include <errno.h>
 #include <log.h>
 #include <malloc.h>

drivers/net/sun8i_emac.c

@@ -16,10 +16,10 @@
 #include <asm/global_data.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
-#include <asm/arch/gpio.h>
 #include <common.h>
 #include <clk.h>
 #include <dm.h>
+#include <dm/pinctrl.h>
 #include <fdt_support.h>
 #include <dm/device_compat.h>
 #include <linux/bitops.h>
@@ -29,7 +29,6 @@
 #include <miiphy.h>
 #include <net.h>
 #include <reset.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
 #include <wait_bit.h>
 #if CONFIG_IS_ENABLED(DM_GPIO)
 #include <asm-generic/gpio.h>
@@ -522,85 +521,6 @@ static int sun8i_emac_eth_start(struct udevice *dev)
 	return 0;
 }
 
-static int parse_phy_pins(struct udevice *dev)
-{
-	int offset;
-	const char *pin_name;
-	int drive, pull = SUN4I_PINCTRL_NO_PULL, i;
-	u32 iomux;
-
-	offset = fdtdec_lookup_phandle(gd->fdt_blob, dev_of_offset(dev),
-				       "pinctrl-0");
-	if (offset < 0) {
-		printf("WARNING: emac: cannot find pinctrl-0 node\n");
-		return offset;
-	}
-
-	drive = fdt_getprop_u32_default_node(gd->fdt_blob, offset, 0,
-					     "drive-strength", ~0);
-	if (drive != ~0) {
-		if (drive <= 10)
-			drive = SUN4I_PINCTRL_10_MA;
-		else if (drive <= 20)
-			drive = SUN4I_PINCTRL_20_MA;
-		else if (drive <= 30)
-			drive = SUN4I_PINCTRL_30_MA;
-		else
-			drive = SUN4I_PINCTRL_40_MA;
-	}
-
-	if (fdt_get_property(gd->fdt_blob, offset, "bias-pull-up", NULL))
-		pull = SUN4I_PINCTRL_PULL_UP;
-	else if (fdt_get_property(gd->fdt_blob, offset, "bias-pull-down", NULL))
-		pull = SUN4I_PINCTRL_PULL_DOWN;
-
-	/*
-	 * The GPIO pinmux value is an integration choice, so depends on the
-	 * SoC, not the EMAC variant.
-	 */
-	if (IS_ENABLED(CONFIG_MACH_SUNXI_H3_H5))
-		iomux = SUN8I_IOMUX_H3;
-	else if (IS_ENABLED(CONFIG_MACH_SUN8I_R40))
-		iomux = SUN8I_IOMUX_R40;
-	else if (IS_ENABLED(CONFIG_MACH_SUN50I_H6))
-		iomux = SUN8I_IOMUX_H6;
-	else if (IS_ENABLED(CONFIG_MACH_SUN50I_H616))
-		iomux = SUN8I_IOMUX_H616;
-	else if (IS_ENABLED(CONFIG_MACH_SUN8I_A83T))
-		iomux = SUN8I_IOMUX;
-	else if (IS_ENABLED(CONFIG_MACH_SUN50I))
-		iomux = SUN8I_IOMUX;
-	else
-		BUILD_BUG_ON_MSG(1, "missing pinmux value for Ethernet pins");
-
-	for (i = 0; ; i++) {
-		int pin;
-
-		pin_name = fdt_stringlist_get(gd->fdt_blob, offset,
-					      "pins", i, NULL);
-		if (!pin_name)
-			break;
-
-		pin = sunxi_name_to_gpio(pin_name);
-		if (pin < 0)
-			continue;
-
-		sunxi_gpio_set_cfgpin(pin, iomux);
-
-		if (drive != ~0)
-			sunxi_gpio_set_drv(pin, drive);
-		if (pull != ~0)
-			sunxi_gpio_set_pull(pin, pull);
-	}
-
-	if (!i) {
-		printf("WARNING: emac: cannot find pins property\n");
-		return -2;
-	}
-
-	return 0;
-}
-
 static int sun8i_emac_eth_recv(struct udevice *dev, int flags, uchar **packetp)
 {
 	struct emac_eth_dev *priv = dev_get_priv(dev);
@@ -968,9 +888,6 @@ static int sun8i_emac_eth_of_to_plat(struct udevice *dev)
 
 	priv->interface = pdata->phy_interface;
 
-	if (!priv->use_internal_phy)
-		parse_phy_pins(dev);
-
 	sun8i_pdata->tx_delay_ps = fdtdec_get_int(gd->fdt_blob, node,
 						  "allwinner,tx-delay-ps", 0);
 	if (sun8i_pdata->tx_delay_ps < 0 || sun8i_pdata->tx_delay_ps > 700)

drivers/pinctrl/Kconfig

@@ -312,6 +312,7 @@ source "drivers/pinctrl/nexell/Kconfig"
 source "drivers/pinctrl/nxp/Kconfig"
 source "drivers/pinctrl/renesas/Kconfig"
 source "drivers/pinctrl/rockchip/Kconfig"
+source "drivers/pinctrl/sunxi/Kconfig"
 source "drivers/pinctrl/uniphier/Kconfig"
 
 endmenu

drivers/pinctrl/Makefile

@@ -13,7 +13,7 @@ obj-$(CONFIG_PINCTRL_INTEL) += intel/
 obj-$(CONFIG_ARCH_MTMIPS) += mtmips/
 obj-$(CONFIG_ARCH_RMOBILE) += renesas/
 obj-$(CONFIG_PINCTRL_SANDBOX)	+= pinctrl-sandbox.o
-
+obj-$(CONFIG_PINCTRL_SUNXI)	+= sunxi/
 obj-$(CONFIG_PINCTRL_UNIPHIER)	+= uniphier/
 obj-$(CONFIG_PINCTRL_PIC32)	+= pinctrl_pic32.o
 obj-$(CONFIG_PINCTRL_EXYNOS)	+= exynos/

drivers/pinctrl/pinctrl-generic.c

@@ -3,6 +3,7 @@
  * Copyright (C) 2015  Masahiro Yamada <yamada.masahiro@socionext.com>
  */
 
+#define DEBUG
 #include <common.h>
 #include <dm.h>
 #include <dm/device_compat.h>

drivers/pinctrl/pinctrl-uclass.c

@@ -5,6 +5,7 @@
 
 #define LOG_CATEGORY UCLASS_PINCTRL
 
+#define DEBUG
 #include <common.h>
 #include <malloc.h>
 #include <asm/global_data.h>

drivers/pinctrl/sunxi/Kconfig

@@ -0,0 +1,10 @@
+if ARCH_SUNXI
+
+config PINCTRL_SUNXI
+	bool
+
+config PINCTRL_SUN50I_H5
+	bool "Support for the Allwinner H5 PIO"
+	select PINCTRL_SUNXI
+
+endif

drivers/pinctrl/sunxi/Makefile

@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0
+
+obj-y					+= pinctrl-sunxi.o
+
+obj-$(CONFIG_PINCTRL_SUN50I_H5)		+= pinctrl-sun50i-h5.o

drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c

@@ -0,0 +1,69 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dm.h>
+
+#include "pinctrl-sunxi.h"
+
+static const struct sunxi_pinctrl_cfg sun50i_h5_pinctrl_cfgs[] = {
+	SUNXI_PINCTRL_CFG(C,  5, MMC2, 3),
+	SUNXI_PINCTRL_CFG(C,  6, MMC2, 3),
+	SUNXI_PINCTRL_CFG(C,  8, MMC2, 3),
+	SUNXI_PINCTRL_CFG(C,  9, MMC2, 3),
+	SUNXI_PINCTRL_CFG(C, 10, MMC2, 3),
+	SUNXI_PINCTRL_CFG(C, 11, MMC2, 3),
+	SUNXI_PINCTRL_CFG(C, 12, MMC2, 3),
+	SUNXI_PINCTRL_CFG(C, 13, MMC2, 3),
+	SUNXI_PINCTRL_CFG(C, 14, MMC2, 3),
+	SUNXI_PINCTRL_CFG(C, 15, MMC2, 3),
+	SUNXI_PINCTRL_CFG(C, 16, MMC2, 3),
+	SUNXI_PINCTRL_CFG(D,  0, EMAC, 2),
+	SUNXI_PINCTRL_CFG(D,  1, EMAC, 2),
+	SUNXI_PINCTRL_CFG(D,  2, EMAC, 2),
+	SUNXI_PINCTRL_CFG(D,  3, EMAC, 2),
+	SUNXI_PINCTRL_CFG(D,  4, EMAC, 2),
+	SUNXI_PINCTRL_CFG(D,  5, EMAC, 2),
+	SUNXI_PINCTRL_CFG(D,  6, EMAC, 2),
+	SUNXI_PINCTRL_CFG(D,  7, EMAC, 2),
+	SUNXI_PINCTRL_CFG(D,  8, EMAC, 2),
+	SUNXI_PINCTRL_CFG(D,  9, EMAC, 2),
+	SUNXI_PINCTRL_CFG(D, 10, EMAC, 2),
+	SUNXI_PINCTRL_CFG(D, 11, EMAC, 2),
+	SUNXI_PINCTRL_CFG(D, 12, EMAC, 2),
+	SUNXI_PINCTRL_CFG(D, 13, EMAC, 2),
+	SUNXI_PINCTRL_CFG(D, 14, EMAC, 2),
+	SUNXI_PINCTRL_CFG(D, 15, EMAC, 2),
+	SUNXI_PINCTRL_CFG(D, 16, EMAC, 2),
+	SUNXI_PINCTRL_CFG(D, 17, EMAC, 2),
+	SUNXI_PINCTRL_CFG(F,  0, MMC0, 2),
+	SUNXI_PINCTRL_CFG(F,  1, MMC0, 2),
+	SUNXI_PINCTRL_CFG(F,  2, MMC0, 2),
+	SUNXI_PINCTRL_CFG(F,  3, MMC0, 2),
+	SUNXI_PINCTRL_CFG(F,  4, MMC0, 2),
+	SUNXI_PINCTRL_CFG(F,  5, MMC0, 2),
+};
+
+static const struct sunxi_pinctrl_desc sun50i_h5_pinctrl_desc = {
+	.cfgs		= sun50i_h5_pinctrl_cfgs,
+	.ncfgs		= ARRAY_SIZE(sun50i_h5_pinctrl_cfgs),
+	.first_bank	= 'A',
+	.nbanks		= 7,
+};
+
+static const struct udevice_id sun50i_h5_pinctrl_ids[] = {
+	{
+		.compatible = "allwinner,sun50i-h5-pinctrl",
+		.data = (ulong)&sun50i_h5_pinctrl_desc,
+	},
+	{ }
+};
+
+U_BOOT_DRIVER(pinctrl_sunxi) = {
+	.name		= "sun50i-h5-pinctrl",
+	.id		= UCLASS_PINCTRL,
+	.of_match	= sun50i_h5_pinctrl_ids,
+	.bind		= sunxi_pinctrl_bind,
+	.probe		= sunxi_pinctrl_probe,
+	.of_to_plat	= sunxi_pinctrl_of_to_plat,
+	.plat_auto	= sizeof(struct sunxi_pinctrl_plat),
+	.ops		= &sunxi_pinctrl_ops,
+};