Do not use x86 specific fence on Miri

smol-rs · Jul 20, 2022 · d61005f · d61005f
1 parent bc4f426
commit d61005f
Showing 1 changed file with 4 additions and 1 deletion.
diff --git a/src/lib.rs b/src/lib.rs
@@ -446,7 +446,10 @@ impl<T> fmt::Display for PushError<T> {
 /// Equivalent to `atomic::fence(Ordering::SeqCst)`, but in some cases faster.
 #[inline]
 fn full_fence() {
-    if cfg!(any(target_arch = "x86", target_arch = "x86_64")) {
+    if cfg!(all(
+        any(target_arch = "x86", target_arch = "x86_64"),
+        not(miri)
+    )) {
         // HACK(stjepang): On x86 architectures there are two different ways of executing
         // a `SeqCst` fence.
         //