Refactor - lduw to hor64

[Lichtso]

It makes more sense for the lduw (load upper word immediate) instruction introduced in #486 to be an arithmetic class instruction as it resembles or64 reg, imm the most, just that it is a high-operand version of it. This also empties the load immediate BPF instruction class in SBPFv2.

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In the LLVM backend, the instruction info just needs to be adjusted slightly (marked as bold):
https://github.com/solana-labs/llvm-project/blob/7b8db05b564faffb522434b73b7082662171f94a/llvm/lib/Target/SBF/SBFInstrInfo.td#L337

	first instruction					second instruction
	op	dst	src	offset	imm	op	dst	src	offset	imm
before	0x18	reg	0	0	0..32	0x00	0	0	0	32..64
after	0xB4	reg	0	0	0..32	0xF7	reg	0	0	32..64

[codecov-commenter]

Codecov Report

Merging #496 (cbe0cd9) into main (42e5b3b) will decrease coverage by 0.01%.
The diff coverage is 90.00%.

@@            Coverage Diff             @@
##             main     #496      +/-   ##
==========================================
- Coverage   89.63%   89.63%   -0.01%     
==========================================
  Files          23       23              
  Lines       10105    10104       -1     
==========================================
- Hits         9058     9057       -1     
  Misses       1047     1047              

Files Changed	Coverage Δ
src/disassembler.rs	93.36% <0.00%> (ø)
src/ebpf.rs	79.59% <ø> (ø)
src/assembler.rs	98.82% <100.00%> (-0.01%)	⬇️
src/interpreter.rs	97.67% <100.00%> (ø)
src/jit.rs	92.45% <100.00%> (ø)
src/static_analysis.rs	65.82% <100.00%> (ø)
src/verifier.rs	97.50% <100.00%> (ø)