[CMIS] Skip re-init flow for SW-controlled ports in case of fastboot

Signed-off-by: vadymhlushko-mlnx <vadymh@nvidia.com>
sonic-net · Apr 16, 2024 · a98cf6f · a98cf6f
1 parent 4ed4fa8
commit a98cf6f
Showing 1 changed file with 13 additions and 5 deletions.
diff --git a/sonic-xcvrd/xcvrd/xcvrd.py b/sonic-xcvrd/xcvrd/xcvrd.py
@@ -1260,6 +1260,8 @@ def task_worker(self):
         for lport in logical_port_list:
             self.update_port_transceiver_status_table_sw_cmis_state(lport, CMIS_STATE_UNKNOWN)
 
+        is_fast_reboot = is_fast_reboot_enabled()
+
         # APPL_DB for CONFIG updates, and STATE_DB for insertion/removal
         sel, asic_context = port_mapping.subscribe_port_update_event(self.namespaces, helper_logger)
         while not self.task_stopping_event.is_set():
@@ -1402,11 +1404,17 @@ def task_worker(self):
 
                         if self.port_dict[lport]['host_tx_ready'] != 'true' or \
                                 self.port_dict[lport]['admin_status'] != 'up':
-                           self.log_notice("{} Forcing Tx laser OFF".format(lport))
-                           # Force DataPath re-init
-                           api.tx_disable_channel(media_lanes_mask, True)
-                           self.update_port_transceiver_status_table_sw_cmis_state(lport, CMIS_STATE_READY)
-                           continue
+                            if is_fast_reboot:
+                                self.log_notice("{} Skip re-init flow".format(lport))
+                                self.log_notice("{}: READY".format(lport))
+                                self.update_port_transceiver_status_table_sw_cmis_state(lport, CMIS_STATE_READY)
+                                self.post_port_active_apsel_to_db(api, lport, host_lanes_mask)
+                            else:
+                                self.log_notice("{} Forcing Tx laser OFF".format(lport))
+                                # Force DataPath re-init
+                                api.tx_disable_channel(media_lanes_mask, True)
+                                self.update_port_transceiver_status_table_sw_cmis_state(lport, CMIS_STATE_READY)
+                            continue
                     # Configure the target output power if ZR module
                         if api.is_coherent_module():
                            tx_power = self.port_dict[lport]['tx_power']