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Use Intel Cache Allocation Technology #227
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More information and references for CAT are in this blog post. |
Since Linux 4.12, this feature also supports allocating memory bandwidth, which we should also use. |
@PhilippWendler interested in this for gsoc 2019 the prerequisite states it says "maybe C" would be required,i am super comfortable with python(one of the requirements),worked with C but not with hardware level C.So basically my questions is what is the level of C that would be involved. |
Probably not too difficult. The goal is actually to have all in Python, and only if necessary use C. Soo far we managed to never need C, but I cannot guarantee it for this project idea. |
Hi @PhilippWendler ,
Also what should I do to increase my proposal acceptance chance, any tasks or report I should create,for now I am setting up this program on machine get bit hang of it.Please point out some code/task so that I can appreciate the complexity of this task and prepare suitable and acheivable timeline for it. Finally thanks for reading, waiting for your reply. |
Hi @miscellaneously, As most of the code for managing limitations, core assignments and measurements is part of the class A first step would be to update the information given in the beginning of this issue, because the statement is already two years old and none of our team has tracked the latest development for this feature aside of BenchExec. The whole feature might already be available in a current Linux kernel, maybe with some nice API, just like CGroups. You will need to collect some information and updates on this topic. |
Thnx,
I would surely do now some research on CAT and its implementation and
revert back here.
…On Fri, Mar 15, 2019 at 6:54 PM Karlheinz Friedberger < ***@***.***> wrote:
Hi @miscellaneously <https://github.com/miscellaneously>,
Philipp is on holiday a few days, but I will try to answer your questions
as far as possible.
As most of the code for managing limitations, core assignments and
measurements is part of the class runexecutor.py, this might be a good
point where new code for this feature should be added in the end.
A first step would be to update the information given in the beginning of
this issue, because the statement is already two years old and none of our
team has tracked the latest development for this feature aside of
BenchExec. The whole feature might already be available in a current Linux
kernel, maybe with some nice API, just like CGroups. You will need to
collect some information and updates on this topic.
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Hello @kfriedberger @PhilippWendler |
@alohamora implemented what is currently possible in #446. |
Some Intel Xeons support the Cache Allocation Technology (CAT), which allows controlling which CPU cores may use which parts of the (L3) cache. It should be possible to use this for avoiding the influence of cache performance for parallel benchmarks on the same CPU.
We should investigate whether this is indeed helpful and whether support can be added to BenchExec. There is a tool from Intel (documentation) that we can use for investigation.
Support for this was also added to Linux 4.10 (documentation, article, slides). If we add support for CAT to BenchExec, we should probably use this kernel feature instead of directly accessing the CPU via its MSRs.
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