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Use Intel Cache Allocation Technology #227

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PhilippWendler opened this issue Feb 19, 2017 · 9 comments
Closed

Use Intel Cache Allocation Technology #227

PhilippWendler opened this issue Feb 19, 2017 · 9 comments
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enhancement GSoC Potential topic for Google Summer of Code

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@PhilippWendler
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Some Intel Xeons support the Cache Allocation Technology (CAT), which allows controlling which CPU cores may use which parts of the (L3) cache. It should be possible to use this for avoiding the influence of cache performance for parallel benchmarks on the same CPU.

We should investigate whether this is indeed helpful and whether support can be added to BenchExec. There is a tool from Intel (documentation) that we can use for investigation.

Support for this was also added to Linux 4.10 (documentation, article, slides). If we add support for CAT to BenchExec, we should probably use this kernel feature instead of directly accessing the CPU via its MSRs.

@PhilippWendler
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More information and references for CAT are in this blog post.

@PhilippWendler
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Since Linux 4.12, this feature also supports allocating memory bandwidth, which we should also use.

@mm-git01
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mm-git01 commented Mar 3, 2019

@PhilippWendler interested in this for gsoc 2019 the prerequisite states it says "maybe C" would be required,i am super comfortable with python(one of the requirements),worked with C but not with hardware level C.So basically my questions is what is the level of C that would be involved.

@PhilippWendler
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Probably not too difficult. The goal is actually to have all in Python, and only if necessary use C. Soo far we managed to never need C, but I cannot guarantee it for this project idea.

@miscellaneously
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Hi @PhilippWendler ,
I just went through the articles and references you mentioned above , I found them intresting, I want to contribute to this project, can you please point out where exactly in benchexec, this feature is going to be integrated or i have to find that by myself as you have mentioned that

We should investigate whether this is indeed helpful and whether support can be added to BenchExec.

Also what should I do to increase my proposal acceptance chance, any tasks or report I should create,for now I am setting up this program on machine get bit hang of it.Please point out some code/task so that I can appreciate the complexity of this task and prepare suitable and acheivable timeline for it.

Finally thanks for reading, waiting for your reply.

@kfriedberger
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Hi @miscellaneously,
Philipp is on holiday a few days, but I will try to answer your questions as far as possible.

As most of the code for managing limitations, core assignments and measurements is part of the class runexecutor.py, this might be a good point where new code for this feature should be added in the end.

A first step would be to update the information given in the beginning of this issue, because the statement is already two years old and none of our team has tracked the latest development for this feature aside of BenchExec. The whole feature might already be available in a current Linux kernel, maybe with some nice API, just like CGroups. You will need to collect some information and updates on this topic.

@miscellaneously
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miscellaneously commented Mar 15, 2019 via email

@alohamora
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Hello @kfriedberger @PhilippWendler
I know I am pretty late in proposing for GSOC, but I am really excited about working on the benchexec tool for implementing cache allocation technology support.
I have been thoroughly reading the Reliable Benchmarking: Requirements and Solutions paper and as per the results documented in section 4.4, we observed a significant impact of sharing memory bandwidth and cache.
Moreover as per the restrictions defined on the benchmarked tool in section 1.2, we can fairly say that the benchmarked tool has a negligible memory reuse profile and the current memory contention schemes leads to high miss frequency for these programs.
Therefore I think that we can use CAT for benchexec to minimize the high miss frequency in parallel executions. This is also confirmed in the results documented in this slide.
Moreover the Resource Director Technology package provides the OS interface support for L3 CAT, L2 CAT in linux kernel 4.10 and it has also added support for memory bandwidth allocation (MBA) in kernel 4.12.
Thus we can use this kernel extension instead of using MSRs which is also documented as a preferred choice in their documentation.
Therefore, I am really excited to work on benchexec and would really like your help in building a proposal for the same.

@PhilippWendler
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@alohamora implemented what is currently possible in #446.

@PhilippWendler PhilippWendler added the GSoC Potential topic for Google Summer of Code label Mar 5, 2024
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enhancement GSoC Potential topic for Google Summer of Code
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