Interstage Interface Panels (IIP) are vertical mounted PCBs designed to give external access to the modules inside of a 2U or 3U CubeSat during final assembly, integration and testing. IIP is composed by 4 different boards, the complete set allows for the nanosatellite to be charged, programed and debugged.
- doc: IIP documentation.
- hardware: IIP hardware project (sources and outputs).
The IIP hardware releases are synchronized in order to garantee compatibility. Refer to the documentation for compatibility notes.
This project is licensed under CERN Open Hardware License (version 2). The documentation is licensed under Creative Commons Attribution-ShareAlike 4.0 International (CC BY-SA 4.0).