JP-3365: Increase MOS cutout margin

[melanieclarke]

Resolves JP-3365

Closes #7877

This PR addresses edge effects in resampling MOS slit cutouts by adding a couple extra pixels of WCS coverage at the top and bottom of each slit.

Checklist for maintainers

• added entry in CHANGES.rst within the relevant release section
• updated or added relevant tests
• updated relevant documentation
• added relevant milestone
• added relevant label(s)
• ran regression tests, post a link to the Jenkins job below.
  How to run regression tests on a PR
• Make sure the JIRA ticket is resolved properly

[codecov]

Codecov Report

All modified lines are covered by tests ✅

Files	Coverage Δ
jwst/assign_wcs/nirspec.py	93.66% <100.00%> (ø)

📢 Thoughts on this report? Let us know!.

[hbushouse]

Started a regression test run against the PR branch at https://plwishmaster.stsci.edu:8081/job/RT/job/JWST-Developers-Pull-Requests/977 Expecting small differences in results for any MOS processing.

[hbushouse]

Code updates are simple enough. Will wait for regtests to finish before final approval.

[hbushouse]

Regression test results show a few unrelated failures (cause is known) and many expected differences in all MOS products beyond the stage where extract_2d has been run to extract individual slitlets. All cal, s2d, and other intermediate level-2b products show differences in the extraction region size, almost always an extra 4 pixels in the cross-dispersion direction (2 on top and bottom?), all of which seems reasonable. 1D extractions also show small differences due to inclusion of new edge pixel values. So I think this looks OK.