Skip to content

Commit

Permalink
Merge pull request #11 from kitune-san/dma-ram-refresh
Browse files Browse the repository at this point in the history
Dma ram refresh
  • Loading branch information
spark2k06 committed Jun 24, 2022
2 parents bac15f3 + e6a6c3e commit f205e8a
Show file tree
Hide file tree
Showing 5 changed files with 54 additions and 9 deletions.
20 changes: 19 additions & 1 deletion rtl/KFPC-XT/HDL/Chipset.sv
Expand Up @@ -124,6 +124,24 @@ module CHIPSET (
logic data_bus_out_from_chipset;
logic internal_data_bus_direction;

logic prev_timer_count_1;
logic DRQ0;

always_ff @(negedge clock) begin
prev_timer_count_1 <= timer_counter_out[1];
end

always_ff @(negedge clock, posedge reset) begin
if (reset)
DRQ0 <= 1'b0;
else if (~dma_acknowledge_n[0])
DRQ0 <= 1'b0;
else if (~prev_timer_count_1 & timer_counter_out[1])
DRQ0 <= 1'b1;
else
DRQ0 <= DRQ0;
end

READY u_READY (
.clock (clock),
.reset (reset),
Expand Down Expand Up @@ -170,7 +188,7 @@ module CHIPSET (
.memory_write_n (memory_write_n),
.memory_write_n_ext (memory_write_n_ext),
.memory_write_n_direction (memory_write_n_direction),
.dma_request (dma_request),
.dma_request ({dma_request[3:1], DRQ0}),
.dma_acknowledge_n (dma_acknowledge_n),
.address_enable_n (address_enable_n),
.terminal_count_n (terminal_count_n)
Expand Down
3 changes: 3 additions & 0 deletions rtl/KFPC-XT/HDL/KF8237/HDL/KF8237.sv
Expand Up @@ -46,6 +46,7 @@ module KF8237 (
logic [3:0] write_base_and_current_address;
logic [3:0] write_base_and_current_word_count;
logic clear_byte_pointer;
logic set_byte_pointer;
logic master_clear;
logic clear_mask_register;
logic read_temporary_register;
Expand Down Expand Up @@ -78,6 +79,7 @@ module KF8237 (
.write_base_and_current_word_count (write_base_and_current_word_count),
// -- software command
.clear_byte_pointer (clear_byte_pointer),
.set_byte_pointer (set_byte_pointer),
.master_clear (master_clear),
.clear_mask_register (clear_mask_register),
// -- read
Expand Down Expand Up @@ -150,6 +152,7 @@ module KF8237 (
.write_base_and_current_word_count (write_base_and_current_word_count),
// -- software command
.clear_byte_pointer (clear_byte_pointer),
.set_byte_pointer (set_byte_pointer),
.master_clear (master_clear),
// -- read
.read_current_address (read_current_address),
Expand Down
Expand Up @@ -19,6 +19,7 @@ module KF8237_Address_And_Count_Registers (
input logic [3:0] write_base_and_current_word_count,
// -- software command
input logic clear_byte_pointer,
input logic set_byte_pointer,
input logic master_clear,
// -- read
input logic [3:0] read_current_address,
Expand Down Expand Up @@ -74,6 +75,8 @@ module KF8237_Address_And_Count_Registers (
byte_pointer <= 1'b0;
else if ((master_clear) || (clear_byte_pointer))
byte_pointer <= 1'b0;
else if (set_byte_pointer)
byte_pointer <= 1'b1;
else if (update_byte_pointer)
if (byte_pointer)
byte_pointer <= 1'b0;
Expand Down
2 changes: 2 additions & 0 deletions rtl/KFPC-XT/HDL/KF8237/HDL/KF8237_Bus_Control_Logic.sv
Expand Up @@ -30,6 +30,7 @@ module KF8237_Bus_Control_Logic (
output logic [3:0] write_base_and_current_word_count,
// -- software command
output logic clear_byte_pointer,
output logic set_byte_pointer,
output logic master_clear,
output logic clear_mask_register,
// -- read
Expand Down Expand Up @@ -93,6 +94,7 @@ module KF8237_Bus_Control_Logic (

// Generate software command
assign clear_byte_pointer = write_flag & (stable_address == 4'b1100);
assign set_byte_pointer = read_flag & (stable_address == 4'b1100);
assign master_clear = write_flag & (stable_address == 4'b1101);
assign clear_mask_register = write_flag & (stable_address == 4'b1110);

Expand Down
35 changes: 27 additions & 8 deletions rtl/KFPC-XT/HDL/KF8237/HDL/KF8237_Timing_And_Control.sv
Expand Up @@ -86,8 +86,10 @@ module KF8237_Timing_And_Control (
logic [1:0] dma_select;
logic [3:0] dma_acknowledge_ff;
logic terminal_count;
logic terminal_count_internal;
logic reoutput_high_address;
logic external_end_of_process;
logic prev_read_status_register;

//
// Command Register
Expand Down Expand Up @@ -516,16 +518,26 @@ module KF8237_Timing_And_Control (
// Terminal Count Signal (NOTE:Posedge)
//
always_ff @(posedge clock, posedge reset) begin
if (reset)
if (reset) begin
terminal_count <= 1'b0;
else if (master_clear)
terminal_count_internal <= 1'b0;
end
else if (master_clear) begin
terminal_count <= 1'b0;
else if (state == S4)
terminal_count_internal <= 1'b0;
end
else if (state == S4) begin
terminal_count <= 1'b0;
else if (next_word)
terminal_count_internal <= 1'b0;
end
else if (next_word) begin
terminal_count <= underflow;
else
terminal_count_internal <= underflow;
end
else begin
terminal_count <= 1'b0;
terminal_count_internal <= terminal_count_internal;
end
end

assign end_of_process_n_out = ~terminal_count;
Expand All @@ -552,23 +564,30 @@ module KF8237_Timing_And_Control (
else if (master_clear)
end_of_process_internal <= 1'b0;
else if (next_state == S4)
end_of_process_internal <= terminal_count | external_end_of_process;
end_of_process_internal <= terminal_count_internal | external_end_of_process;
else
end_of_process_internal <= 1'b0;
end

//
// Status Register
//
always_ff @(negedge clock, posedge reset) begin
if (reset)
prev_read_status_register <= 1'b0;
else
prev_read_status_register <= read_status_register;
end

always_ff @(negedge clock, posedge reset) begin
if (reset)
terminal_count_state <= 0;
else if (master_clear)
terminal_count_state <= 0;
else if (read_status_register)
else if (prev_read_status_register & ~read_status_register)
terminal_count_state <= 0;
else if (end_of_process_internal)
terminal_count_state <= dma_acknowledge_internal;
terminal_count_state <= terminal_count_state | dma_acknowledge_internal;
else
terminal_count_state <= terminal_count_state;
end
Expand Down

0 comments on commit f205e8a

Please sign in to comment.