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Add cache line flush request/response to simpleMem interface #152

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merged 2 commits into from
Oct 25, 2016
Merged

Add cache line flush request/response to simpleMem interface #152

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d9b5eca
Add cache line flush request/response to simpleMem interface
gvoskuilen Oct 21, 2016
be6e571
Merge branch 'devel' into mh_cacheflush
gvoskuilen Oct 21, 2016
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8 changes: 6 additions & 2 deletions src/sst/core/interfaces/simpleMem.h
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Original file line number Diff line number Diff line change
Expand Up @@ -55,7 +55,10 @@ class SimpleMem : public SubComponent {
Read, /*!< Issue a Read from Memory */
Write, /*!< Issue a Write to Memory */
ReadResp, /*!< Response from Memory to a Read */
WriteResp /*!< Response from Memory to a Write */
WriteResp, /*!< Response from Memory to a Write */
FlushLine, /*!< Cache flush request - writeback specified line throughout memory system */
FlushLineInv, /*!< Cache flush request - writeback and invalidate specified line throughout memory system */
FlushLineResp, /*!< Response to FlushLine; flag F_FLUSH_SUCCESS indicates success or failure */
} Command;

/**
Expand All @@ -65,7 +68,8 @@ class SimpleMem : public SubComponent {
F_NONCACHEABLE = 1<<1, /*!< This request should not be cached */
F_LOCKED = 1<<2, /*!< This request should be locked. A LOCKED read should be soon followed by a LOCKED write (to unlock) */
F_LLSC = 1<<3,
F_LLSC_RESP = 1<<4
F_LLSC_RESP = 1<<4,
F_FLUSH_SUCCESS = 1<<5 /*!< This flag is set if the flush was successful. Flush may fail due to LOCKED lines */
} Flags;

/** Type of the payload or data */
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