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Fix compile warnings
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Fix a few missing copyright updates
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gvoskuilen committed May 16, 2024
1 parent 1aff94e commit 6ff885a
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Showing 21 changed files with 46 additions and 44 deletions.
4 changes: 2 additions & 2 deletions src/sst/elements/ember/run/configurations/3LevelModel.py
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@@ -1,10 +1,10 @@
#!/usr/bin/env python
#
# Copyright 2009-2022 NTESS. Under the terms
# Copyright 2009-2024 NTESS. Under the terms
# of Contract DE-NA0003525 with NTESS, the U.S.
# Government retains certain rights in this software.
#
# Copyright (c) 2009-2022, NTESS
# Copyright (c) 2009-2024, NTESS
# All rights reserved.
#
# Portions are copyright of other developers:
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Original file line number Diff line number Diff line change
@@ -1,10 +1,10 @@
#!/usr/bin/env python
#
# Copyright 2009-2022 NTESS. Under the terms
# Copyright 2009-2024 NTESS. Under the terms
# of Contract DE-NA0003525 with NTESS, the U.S.
# Government retains certain rights in this software.
#
# Copyright (c) 2009-2022, NTESS
# Copyright (c) 2009-2024, NTESS
# All rights reserved.
#
# Portions are copyright of other developers:
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Original file line number Diff line number Diff line change
@@ -1,10 +1,10 @@
#!/usr/bin/env python
#
# Copyright 2009-2022 NTESS. Under the terms
# Copyright 2009-2024 NTESS. Under the terms
# of Contract DE-NA0003525 with NTESS, the U.S.
# Government retains certain rights in this software.
#
# Copyright (c) 2009-2022, NTESS
# Copyright (c) 2009-2024, NTESS
# All rights reserved.
#
# Portions are copyright of other developers:
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Original file line number Diff line number Diff line change
@@ -1,10 +1,10 @@
#!/usr/bin/env python
#
# Copyright 2009-2022 NTESS. Under the terms
# Copyright 2009-2024 NTESS. Under the terms
# of Contract DE-NA0003525 with NTESS, the U.S.
# Government retains certain rights in this software.
#
# Copyright (c) 2009-2022, NTESS
# Copyright (c) 2009-2024, NTESS
# All rights reserved.
#
# Portions are copyright of other developers:
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4 changes: 2 additions & 2 deletions src/sst/elements/ember/run/configurations/defaultSim.py
Original file line number Diff line number Diff line change
@@ -1,10 +1,10 @@
#!/usr/bin/env python
#
# Copyright 2009-2022 NTESS. Under the terms
# Copyright 2009-2024 NTESS. Under the terms
# of Contract DE-NA0003525 with NTESS, the U.S.
# Government retains certain rights in this software.
#
# Copyright (c) 2009-2022, NTESS
# Copyright (c) 2009-2024, NTESS
# All rights reserved.
#
# Portions are copyright of other developers:
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4 changes: 2 additions & 2 deletions src/sst/elements/ember/run/configurations/detailedSim.py
Original file line number Diff line number Diff line change
@@ -1,10 +1,10 @@
#!/usr/bin/env python
#
# Copyright 2009-2022 NTESS. Under the terms
# Copyright 2009-2024 NTESS. Under the terms
# of Contract DE-NA0003525 with NTESS, the U.S.
# Government retains certain rights in this software.
#
# Copyright (c) 2009-2022, NTESS
# Copyright (c) 2009-2024, NTESS
# All rights reserved.
#
# Portions are copyright of other developers:
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Original file line number Diff line number Diff line change
@@ -1,10 +1,10 @@
#!/usr/bin/env python
#
# Copyright 2009-2022 NTESS. Under the terms
# Copyright 2009-2024 NTESS. Under the terms
# of Contract DE-NA0003525 with NTESS, the U.S.
# Government retains certain rights in this software.
#
# Copyright (c) 2009-2022, NTESS
# Copyright (c) 2009-2024, NTESS
# All rights reserved.
#
# Portions are copyright of other developers:
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4 changes: 2 additions & 2 deletions src/sst/elements/ember/run/configurations/sandyBridgeModel.py
Original file line number Diff line number Diff line change
@@ -1,9 +1,9 @@

# Copyright 2009-2022 NTESS. Under the terms
# Copyright 2009-2024 NTESS. Under the terms
# of Contract DE-NA0003525 with NTESS, the U.S.
# Government retains certain rights in this software.
#
# Copyright (c) 2009-2022, NTESS
# Copyright (c) 2009-2024, NTESS
# All rights reserved.
#
# Portions are copyright of other developers:
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Original file line number Diff line number Diff line change
@@ -1,10 +1,10 @@
#!/usr/bin/env python
#
# Copyright 2009-2022 NTESS. Under the terms
# Copyright 2009-2024 NTESS. Under the terms
# of Contract DE-NA0003525 with NTESS, the U.S.
# Government retains certain rights in this software.
#
# Copyright (c) 2009-2022, NTESS
# Copyright (c) 2009-2024, NTESS
# All rights reserved.
#
# Portions are copyright of other developers:
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4 changes: 2 additions & 2 deletions src/sst/elements/ember/run/configurations/sandySim.py
Original file line number Diff line number Diff line change
@@ -1,10 +1,10 @@
#!/usr/bin/env python
#
# Copyright 2009-2022 NTESS. Under the terms
# Copyright 2009-2024 NTESS. Under the terms
# of Contract DE-NA0003525 with NTESS, the U.S.
# Government retains certain rights in this software.
#
# Copyright (c) 2009-2022, NTESS
# Copyright (c) 2009-2024, NTESS
# All rights reserved.
#
# Portions are copyright of other developers:
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8 changes: 5 additions & 3 deletions src/sst/elements/memHierarchy/membackend/backing.h
Original file line number Diff line number Diff line change
Expand Up @@ -107,7 +107,9 @@ class BackingMalloc : public Backing {
char str[80];
fscanf(fp,"Number-of-pages: %d\n", &num );
fscanf(fp,"m_allocUnit: %d\n", &m_allocUnit );
fscanf(fp,"m_init: %d\n", &m_init );
int tmpInit;
fscanf(fp,"m_init: %d\n", &tmpInit );
m_init = tmpInit;
fscanf(fp,"m_shift: %d\n", &m_shift );
printf("Number-of-pages: %d\n",num);
printf("m_allocUnit: %d\n",m_allocUnit);
Expand Down Expand Up @@ -222,13 +224,13 @@ class BackingMalloc : public Backing {


void dump( FILE* fp ) {
fprintf(fp,"Number-of-pages: %d\n",m_buffer.size());
fprintf(fp,"Number-of-pages: %zu\n",m_buffer.size());
fprintf(fp,"m_allocUnit: %d\n",m_allocUnit);
fprintf(fp,"m_init: %d\n",m_init);
fprintf(fp,"m_shift: %d\n",m_shift);

for ( auto const& x : m_buffer ) {
fprintf(fp,"addr: %#lx\n",x.first << m_shift);
fprintf(fp,"addr: %#llx\n",x.first << m_shift);
auto length = sizeof(uint8_t)*m_allocUnit;
length /= sizeof(uint64_t);
auto ptr = (uint64_t*) x.second;
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2 changes: 1 addition & 1 deletion src/sst/elements/mmu/simpleMMU.cc
Original file line number Diff line number Diff line change
Expand Up @@ -179,7 +179,7 @@ void SimpleMMU::checkpoint( std::string dir ) {
fprintf(fp,"m_coreToPid.size() %zu\n", m_coreToPid.size());
for ( auto core = 0; core < m_coreToPid.size(); core++ ) {
auto& x = m_coreToPid[core];
fprintf(fp,"core: %d, numPids: %d\n",core,x.size());
fprintf(fp,"core: %d, numPids: %zu\n",core,x.size());
for ( auto j = 0; j < x.size(); j++ ) {
fprintf(fp,"%d ",x[j]);
}
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2 changes: 1 addition & 1 deletion src/sst/elements/mmu/simpleMMU.h
Original file line number Diff line number Diff line change
Expand Up @@ -145,7 +145,7 @@ class SimpleMMU : public MMU {
void checkpoint( FILE* fp ) {
fprintf(fp,"pteMap.size() %zu\n",pteMap.size());
for ( auto & x : pteMap ) {
fprintf(fp,"vpn: %d, ppn: %d, perms: %#lx \n", x.first,x.second.ppn,x.second.perms );
fprintf(fp,"vpn: %d, ppn: %d, perms: %d \n", x.first,x.second.ppn,x.second.perms );
}
}
private:
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4 changes: 2 additions & 2 deletions src/sst/elements/vanadis/decoder/vriscv64decoder.h
Original file line number Diff line number Diff line change
Expand Up @@ -1037,7 +1037,7 @@ class VanadisRISCV64Decoder : public VanadisDecoder
} break;
case 0x1: // SBREAK
{
printf("%#lx %#x SBREAK\n",ins_address,ins);
printf("%#llx %#x SBREAK\n",ins_address,ins);
assert(0);
} break;
}
Expand Down Expand Up @@ -1362,7 +1362,7 @@ class VanadisRISCV64Decoder : public VanadisDecoder
{
if(LIKELY(op_width != 0)) {
output->verbose(CALL_INFO, 16, 0,
"-----> %s.%s 0x%lx / thr: %" PRIu32 " / %" PRIu16 " <- memory[ %" PRIu16 " ] <- %" PRIu16
"-----> %s.%s 0x%llx / thr: %" PRIu32 " / %" PRIu16 " <- memory[ %" PRIu16 " ] <- %" PRIu16
" / width: %" PRIu32 " / aq: %s / rl: %s\n",
getAMO_name(amo_op).c_str(), getAMO_type( func_code3 ).c_str(),
ins_address, hw_thr, rd, rs1, rs2, op_width, perform_aq ? "yes" : "no", perform_rl ? "yes" : "no");
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2 changes: 1 addition & 1 deletion src/sst/elements/vanadis/os/include/fdTable.h
Original file line number Diff line number Diff line change
Expand Up @@ -119,7 +119,7 @@ class FileDescriptor {
assert( 1 == fscanf(fp,"flags: %d\n", &flags ) );
output->verbose(CALL_INFO, 0, VANADIS_DBG_CHECKPOINT,"flags: %d\n", flags );

assert( 1 == fscanf(fp,"mode: %d\n", &mode) );
assert( 1 == fscanf(fp,"mode: %hd\n", &mode) );
output->verbose(CALL_INFO, 0, VANADIS_DBG_CHECKPOINT,"mode: %d\n", mode);
}

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2 changes: 1 addition & 1 deletion src/sst/elements/vanadis/os/include/process.h
Original file line number Diff line number Diff line change
Expand Up @@ -244,7 +244,7 @@ class ProcessInfo {
fprintf(fp,"m_gid: %d\n",m_gid);
fprintf(fp,"m_core: %d\n",m_core);
fprintf(fp,"m_hwThread: %d\n",m_hwThread);
fprintf(fp,"m_tidAddress: %#lx\n",m_tidAddress);
fprintf(fp,"m_tidAddress: %#llx\n",m_tidAddress);

m_virtMemMap->checkpoint(fp);
m_fileTable->checkpoint(fp);
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2 changes: 1 addition & 1 deletion src/sst/elements/vanadis/os/syscall/clone.cc
Original file line number Diff line number Diff line change
Expand Up @@ -89,7 +89,7 @@ VanadisCloneSyscall::VanadisCloneSyscall( VanadisNodeOSComponent* os, SST::Link*
} else {
// DETACHED is deprecated
if ( ( event->getFlags() & ~RISVC_CLONE_DETACHED ) != CLONE_FLAGS ) {
m_output->fatal(CALL_INFO, -1, "Error: clone, flags not supported %#lx\n",event->getFlags());
m_output->fatal(CALL_INFO, -1, "Error: clone, flags not supported %#llx\n",event->getFlags());
}
m_newThread = new OS::ProcessInfo;

Expand Down
2 changes: 1 addition & 1 deletion src/sst/elements/vanadis/os/syscall/exit.cc
Original file line number Diff line number Diff line change
Expand Up @@ -32,7 +32,7 @@ VanadisExitSyscall::VanadisExitSyscall( VanadisNodeOSComponent* os, SST::Link* c
printf("node=%d pid=%d tid=%d has exited\n", m_os->getNodeNum(), process->getpid(), process->gettid());
} else {
if ( event->getExitCode() > 0 ) {
printf("pid=%d tid=%d has exited with code %lu, Failed\n", process->getpid(), process->gettid(),event->getExitCode());
printf("pid=%d tid=%d has exited with code %llu, Failed\n", process->getpid(), process->gettid(),event->getExitCode());
} else {
printf("pid=%d tid=%d has exited\n", process->getpid(), process->gettid());
}
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12 changes: 6 additions & 6 deletions src/sst/elements/vanadis/os/vnodeos.cc
Original file line number Diff line number Diff line change
Expand Up @@ -307,7 +307,7 @@ VanadisNodeOSComponent::checkpoint( std::string dir )
fprintf(fp,"m_phdr_address: %#" PRIx64 "\n",m_phdr_address);
fprintf(fp,"m_stack_top: %#" PRIx64 "\n",m_stack_top);
fprintf(fp,"m_nodeNum: %d\n",m_nodeNum);
fprintf(fp,"m_osStartTimeNano: %lu\n",m_osStartTimeNano);
fprintf(fp,"m_osStartTimeNano: %llu\n",m_osStartTimeNano);
fprintf(fp,"m_currentTid: %d\n",m_currentTid);

assert( m_pendingFault.empty() );
Expand Down Expand Up @@ -456,16 +456,16 @@ int VanadisNodeOSComponent::checkpointLoad( std::string dir )
output->verbose(CALL_INFO, 0, VANADIS_DBG_CHECKPOINT,"m_pageSize: %d\n",m_pageSize);

assert( 1 == fscanf(fp,"m_phdr_address: %" PRIx64 "\n",&m_phdr_address) );
output->verbose(CALL_INFO, 0, VANADIS_DBG_CHECKPOINT,"m_phdr_address: %#lx\n",m_phdr_address);
output->verbose(CALL_INFO, 0, VANADIS_DBG_CHECKPOINT,"m_phdr_address: %#llx\n",m_phdr_address);

assert( 1 == fscanf(fp,"m_stack_top: %" PRIx64 "\n",&m_stack_top) );
output->verbose(CALL_INFO, 0, VANADIS_DBG_CHECKPOINT,"m_stack_top: %#lx\n",m_stack_top);
output->verbose(CALL_INFO, 0, VANADIS_DBG_CHECKPOINT,"m_stack_top: %#llx\n",m_stack_top);

assert( 1 == fscanf(fp,"m_nodeNum: %d\n",&m_nodeNum) );
output->verbose(CALL_INFO, 0, VANADIS_DBG_CHECKPOINT,"m_nodeNum: %d\n",m_nodeNum);

assert( 1 == fscanf(fp,"m_osStartTimeNano: %lu\n",&m_osStartTimeNano) );
output->verbose(CALL_INFO, 0, VANADIS_DBG_CHECKPOINT,"m_osStartTimeNano: %lu\n",m_osStartTimeNano);
assert( 1 == fscanf(fp,"m_osStartTimeNano: %llu\n",&m_osStartTimeNano) );
output->verbose(CALL_INFO, 0, VANADIS_DBG_CHECKPOINT,"m_osStartTimeNano: %llu\n",m_osStartTimeNano);

assert( 1 == fscanf(fp,"m_currentTid: %d\n",&m_currentTid) );
output->verbose(CALL_INFO, 0, VANADIS_DBG_CHECKPOINT,"m_currentTid: %d\n",m_currentTid);
Expand Down Expand Up @@ -624,7 +624,7 @@ VanadisNodeOSComponent::handleIncomingSyscall(SST::Event* ev) {
m_flushPages.push_back( 0x28c0 );

for ( auto & x : m_flushPages ) {
printf("%#lx\n",x);
printf("%#llx\n",x);
StandardMem::Request* req = new SST::Interfaces::StandardMem::FlushAddr( x, 64, true, 5, 0 );
mem_if->send(req);
}
Expand Down
6 changes: 3 additions & 3 deletions src/sst/elements/vanadis/os/vphysmemmanager.h
Original file line number Diff line number Diff line change
Expand Up @@ -145,7 +145,7 @@ class PhysMemManager {

output->verbose(CALL_INFO, 0, VANADIS_DBG_CHECKPOINT,"PhysMemManager %s\n", filename.str().c_str());

fprintf(fp,"m_numAllocated %lu\n",m_numAllocated);
fprintf(fp,"m_numAllocated %llu\n",m_numAllocated);
m_bitMap.checkpoint(fp);
}
void checkpointLoad( SST::Output* output , std::string dir ) {
Expand All @@ -154,8 +154,8 @@ class PhysMemManager {
auto fp = fopen(filename.str().c_str(),"r");
assert(fp);

assert( 1 == fscanf(fp,"m_numAllocated %ld\n",&m_numAllocated) );
output->verbose(CALL_INFO, 0, VANADIS_DBG_CHECKPOINT,"m_numAllocated %lu\n",m_numAllocated);
assert( 1 == fscanf(fp,"m_numAllocated %llu\n",&m_numAllocated) );
output->verbose(CALL_INFO, 0, VANADIS_DBG_CHECKPOINT,"m_numAllocated %llu\n",m_numAllocated);
m_bitMap.checkpointLoad(output,fp);
}

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8 changes: 4 additions & 4 deletions src/sst/elements/vanadis/vanadis.cc
Original file line number Diff line number Diff line change
Expand Up @@ -2173,8 +2173,8 @@ VANADIS_COMPONENT::checkpoint(FILE* fp )
fprintf(fp,"Hardware thread: %d\n",i);
if ( m_checkpointing[i] ) {
fprintf(fp,"active: yes\n");
fprintf(fp,"rob[0] %#lx %s\n", rob[i]->peekAt(0)->getInstructionAddress(), rob[i]->peekAt(0)->getInstCode() );
fprintf(fp,"rob[1] %#lx %s\n", rob[i]->peekAt(1)->getInstructionAddress(), rob[i]->peekAt(1)->getInstCode() );
fprintf(fp,"rob[0] %#llx %s\n", rob[i]->peekAt(0)->getInstructionAddress(), rob[i]->peekAt(0)->getInstCode() );
fprintf(fp,"rob[1] %#llx %s\n", rob[i]->peekAt(1)->getInstructionAddress(), rob[i]->peekAt(1)->getInstCode() );

auto isa_table = retire_isa_tables[i];
auto reg_file = register_files[i];
Expand Down Expand Up @@ -2220,12 +2220,12 @@ VANADIS_COMPONENT::checkpointLoad(FILE* fp)

uint64_t startAddr;
char str1[40],str2[40];
assert( 3 == fscanf(fp,"%s %" PRIx64 " %s\n",&str1,&value,str2) );
assert( 3 == fscanf(fp,"%s %" PRIx64 " %s\n",str1,&value,str2) );
startAddr = value + 4;
output->verbose(CALL_INFO, 0, VANADIS_DBG_CHECKPOINT,"%s %#" PRIx64 " %s\n",str1,value,str2 );
output->verbose(CALL_INFO, 0, VANADIS_DBG_CHECKPOINT,"set thread %d start address %#" PRIx64 "\n",hw_thr,startAddr);

assert( 3 == fscanf(fp,"%s %" PRIx64 " %s\n",&str1,&value,str2) );
assert( 3 == fscanf(fp,"%s %" PRIx64 " %s\n",str1,&value,str2) );
output->verbose(CALL_INFO, 0, VANADIS_DBG_CHECKPOINT,"%s %#" PRIx64 " %s\n",str1,value,str2 );

assert( 1 == fscanf(fp,"tlsPtr: %" PRIx64 "\n",&value) );
Expand Down

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