Segfault on

[ainsleyrutterford]

I'm attempting to use SST to model a memory hierarchy to use with a single core CPU simulator. The CPU performs some initial set up before the clock starts ticking (such as initialising certain memory addresses that correspond to the stack pointer etc.).

I can't figure out how to access memory through any means other than the simpleMem sendRequest() function, so for now I am simply attempting to iterate through the CPU memory and send a write request per address. The issue is that when I attempt this, different crashes occur depending on the size of the memory that is being copied.

I have created a minimal working example available in this repository. It is a simple component that first initialises an array with arbitrary values, then begins the simulation and sends one write request per tick. The write requests are all of size 1 and are to each address in ascending order. These write requests are storing the contents of the array to the SST memory hierarchy. Once all of the array has been stored in the SST memory hierarchy, the component then performs one read request per tick to each memory address to check if the stored values are correct.

When running this component with an array of varying sizes, the simulation crashes or fails in different ways:

memorySize < 2974          - runs fine, but some addresses between 2064 and 2078 are wrong
2974 <= memorySize < 6165  - crashes after simulation is complete
6165 <= memorySize < 7553  - segfaults while checking memory
7553 <= memorySize         - segfaults while completing initial memory transfer

Output when running with memorySize = 2973:

(base) bash-4.2$ sst test.py 
testElement-> Using memory of size 2973
testElement-> CPU clock configured for 100MHz
testElement-> Loading memory interface: memHierarchy.memInterface ...
testElement-> Memory interface memHierarchy.memInterface successfully loaded.
testElement-> Component setup successfully.
testElement-> Transferring memory...
testElement-> Memory transferred.
testElement-> Checking memory is correct...
testElement-> Mismatch at address: 2064. Values: 135 and 32.
testElement-> Mismatch at address: 2066. Values: 0 and 34.
testElement-> Mismatch at address: 2068. Values: 0 and 36.
testElement-> Mismatch at address: 2070. Values: 0 and 38.
testElement-> Mismatch at address: 2072. Values: 136 and 40.
testElement-> Mismatch at address: 2074. Values: 0 and 42.
testElement-> Mismatch at address: 2076. Values: 0 and 44.
testElement-> Mismatch at address: 2078. Values: 0 and 46.
testElement-> Memory checks complete.
testElement-> Component finished.
Simulation is complete, simulated time: 59.47 us

Output when running with memorySize = 2974:

(base) bash-4.2$ sst test.py 
testElement-> Using memory of size 2974
testElement-> CPU clock configured for 100MHz
testElement-> Loading memory interface: memHierarchy.memInterface ...
testElement-> Memory interface memHierarchy.memInterface successfully loaded.
testElement-> Component setup successfully.
testElement-> Transferring memory...
testElement-> Memory transferred.
testElement-> Checking memory is correct...
testElement-> Mismatch at address: 2064. Values: 136 and 32.
testElement-> Mismatch at address: 2066. Values: 0 and 34.
testElement-> Mismatch at address: 2068. Values: 0 and 36.
testElement-> Mismatch at address: 2070. Values: 0 and 38.
testElement-> Mismatch at address: 2072. Values: 137 and 40.
testElement-> Mismatch at address: 2074. Values: 0 and 42.
testElement-> Mismatch at address: 2076. Values: 0 and 44.
testElement-> Mismatch at address: 2078. Values: 0 and 46.
testElement-> Memory checks complete.
testElement-> Component finished.
Simulation is complete, simulated time: 59.49 us
*** Error in `sst': free(): invalid next size (fast): 0x0000000000892be0 ***
======= Backtrace: =========
/lib64/libc.so.6(+0x816b9)[0x2aaaac60d6b9]
sst(_ZNSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_PN3SST3ELI17ProvidesInterfaceEESt10_Select1stISC_ESt4lessIS5_ESaISC_EE8_M_eraseEPSt13_Rb_tree_nodeISC_E+0x31)[0x49f831]
sst(_ZNSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_PN3SST3ELI17ProvidesInterfaceEESt10_Select1stISC_ESt4lessIS5_ESaISC_EE8_M_eraseEPSt13_Rb_tree_nodeISC_E+0x1b)[0x49f81b]
sst(_ZNSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_PN3SST3ELI17ProvidesInterfaceEESt10_Select1stISC_ESt4lessIS5_ESaISC_EE8_M_eraseEPSt13_Rb_tree_nodeISC_E+0x1b)[0x49f81b]
sst(_ZNSt10unique_ptrISt3mapINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEES0_IS6_PN3SST3ELI17ProvidesInterfaceESt4lessIS6_ESaISt4pairIKS6_SA_EEESC_SaISD_ISE_SH_EEESt14default_deleteISK_EED1Ev+0x4d)[0x49f98d]
/lib64/libc.so.6(+0x39cd9)[0x2aaaac5c5cd9]
/lib64/libc.so.6(+0x39d27)[0x2aaaac5c5d27]
/lib64/libc.so.6(__libc_start_main+0xfc)[0x2aaaac5ae54c]
sst[0x492d29]
======= Memory map: ========
00400000-0059e000 r-xp 00000000 aff:8924c 162130025460540895             /lustre/home/br-arutterford/sst/local/sstcore-10.0.0/libexec/sstsim.x
0079d000-0079e000 r--p 0019d000 aff:8924c 162130025460540895             /lustre/home/br-arutterford/sst/local/sstcore-10.0.0/libexec/sstsim.x
0079e000-007a0000 rw-p 0019e000 aff:8924c 162130025460540895             /lustre/home/br-arutterford/sst/local/sstcore-10.0.0/libexec/sstsim.x
007a0000-00c11000 rw-p 00000000 00:00
...
Aborted

Output when running with memorySize = 6165:

(base) bash-4.2$ sst test.py 
testElement-> Using memory of size 6165
testElement-> CPU clock configured for 100MHz
testElement-> Loading memory interface: memHierarchy.memInterface ...
testElement-> Memory interface memHierarchy.memInterface successfully loaded.
testElement-> Component setup successfully.
testElement-> Transferring memory...
testElement-> Memory transferred.
testElement-> Checking memory is correct...
Segmentation fault

Output when running with memorySize = 7553:

(base) bash-4.2$ sst test.py 
testElement-> Using memory of size 7553
testElement-> CPU clock configured for 100MHz
testElement-> Loading memory interface: memHierarchy.memInterface ...
testElement-> Memory interface memHierarchy.memInterface successfully loaded.
testElement-> Component setup successfully.
testElement-> Transferring memory...
Segmentation fault

The parameters used for the memory hierarchy components and the links between them are shown in test.py. They are basically copied from exercise 1 from the sst-tutorials repo.

I don't think I'm missing anything, I should be able to write to SST memory via the simpleMem interface one address at a time without it crashing right? The requests are of size 1 so no misaligned loads should be being requested which I initially thought may be have been the issue due to #700. Also, why have some addresses between 2064 and 2078 been stored incorrectly?

Operating system and SST versions:

Operating System: Red Hat Enterprise Linux Server release 7.7

SST-Core Version 10.0.0 configured with the --disable-mpi option and compiled with GCC 8.1.0.

SST-Elements Version 10.0.0 compiled with GCC 8.1.0.

[ainsleyrutterford]

Sorry, posted this duplicate by mistake. Open issue here.