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ARM: HYP/non-sec: Add MIDR check to detect unsupported CPUs
Unlike 9d195a5, which had removed the MIDR check against the "white list" of supported CPUs earlier, now we introduce the "black list" of unsupported CPUs. The current PSCI code is not compatible with the Cortex-A8 CPU used in Allwinner A10/A13 SoCs because of making GIC and virtualization support assumptions. Allwinner A10 and Allwinner A20 (with Cortex-A7 CPU, supported by PSCI) are pin compatible, they can be used as drop-in replacements for each other and share the same PCB design: https://www.olimex.com/Products/OLinuXino/A10/A10-OLinuXino-LIME https://www.olimex.com/Products/OLinuXino/A20/A20-OLinuXino-LIME The same u-boot binary binary can boot on Allwinner A10 and Allwinner A20 with just minor tweaks applied. This patch implements one of such necessary tweaks to allow the PSCI code to be compiled in, but skip it if Cortex-A8 is detected at runtime. The function 'armv7_init_nonsec()' now returns an error in the case if Cortex-A8 is detected. Also an extra error check is added for the 'armv7_init_nonsec()' call. If the board config header file provides CONFIG_ARMV7_ALLOW_SECURE_MODE_FALLBACK define, then the kernel is loaded in secure mode as a fallback. In the case is this define is not provided, the failure to switch to non-secure mode is treated as a fatal error and an appropriate message is displayed. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
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