[refactoring] Clean-up & update for chipid files

- F0, F1, F2, F3, F4, F7
- G0, G4
- H7
- L0, L5, U5
- WB, WL

config/chips/F03x.chip

@@ -1,13 +1,14 @@
-# Chip-ID file for F03x
+# Chip-ID file for STM32F03x device
 #
-chip_id 0x444
-description F03x
-flash_type 1
-flash_pagesize 0x400
-sram_size 0x1000
+dev_type STM32F03x
+ref_manual_id 0091
+chip_id 0x444                // STLINK_CHIPID_STM32_F0xx_SMALL
+flash_type 1                 // STLINK_FLASH_TYPE_F0
+flash_size_reg 0x1ffff7cc
+flash_pagesize 0x400         // 1 KB
+sram_size 0x1000             // 4 KB
 bootrom_base 0x1fffec00
-bootrom_size 0xc00
-option_base 0x1ffff800
-option_size 0x10
+bootrom_size 0xc00           // 3 KB
+option_base 0x1ffff800       // STM32_F0_OPTION_BYTES_BASE
+option_size 0x10             // 16 B
 flags none
-

config/chips/F04x.chip

@@ -1,13 +1,14 @@
-# Chip-ID file for F04x
+# Chip-ID file for STM32F04x device
 #
-chip_id 0x445
-description F04x
-flash_type 1
-flash_pagesize 0x400
-sram_size 0x1800
+dev_type STM32F04x
+ref_manual_id 0091
+chip_id 0x445                // STLINK_CHIPID_STM32_F04
+flash_type 1                 // STLINK_FLASH_TYPE_F0
+flash_size_reg 0x1ffff7cc
+flash_pagesize 0x400         // 1 KB
+sram_size 0x1800             // 6 KB
 bootrom_base 0x1fffec00
-bootrom_size 0xc00
-option_base 0x1ffff800
-option_size 0x10
+bootrom_size 0xc00           // 3 KB
+option_base 0x1ffff800       // STM32_F0_OPTION_BYTES_BASE
+option_size 0x10             // 16 B
 flags none
-

config/chips/F05x.chip

@@ -1,13 +1,14 @@
-# Chip-ID file for F05x
+# Chip-ID file for STM32F05x device
 #
-chip_id 0x440
-description F05x
-flash_type 1
-flash_pagesize 0x400
-sram_size 0x2000
+dev_type STM32F05x
+ref_manual_id 0091
+chip_id 0x440                // STLINK_CHIPID_STM32_F0
+flash_type 1                 // STLINK_FLASH_TYPE_F0
+flash_size_reg 0x1ffff7cc
+flash_pagesize 0x400         // 1 KB
+sram_size 0x2000             // 8 KB
 bootrom_base 0x1fffec00
-bootrom_size 0xc00
-option_base 0x1ffff800
-option_size 0x10
+bootrom_size 0xc00           // 3 KB
+option_base 0x1ffff800       // STM32_F0_OPTION_BYTES_BASE
+option_size 0x10             // 16 B
 flags none
-

config/chips/F07x.chip

@@ -1,13 +1,14 @@
-# Chip-ID file for F07x
+# Chip-ID file for STM32F07x device
 #
-chip_id 0x448
-description F07x
-flash_type 1
-flash_pagesize 0x800
-sram_size 0x4000
+dev_type STM32F07x
+ref_manual_id 0091
+chip_id 0x448                // STLINK_CHIPID_STM32_F0_CAN
+flash_type 1                 // STLINK_FLASH_TYPE_F0
+flash_size_reg 0x1ffff7cc
+flash_pagesize 0x800         // 2 KB
+sram_size 0x4000             // 16 KB
 bootrom_base 0x1fffc800
-bootrom_size 0x3000
-option_base 0x1ffff800
-option_size 0x10
+bootrom_size 0x3000          // 12 KB
+option_base 0x1ffff800       // STM32_F0_OPTION_BYTES_BASE
+option_size 0x10             // 16 B
 flags none
-

config/chips/F09x.chip

@@ -1,13 +1,15 @@
-# Chip-ID file for F09x
+# Chip-ID file for STM32F09x device
 #
-chip_id 0x442
-description F09x
-flash_type 1
-flash_pagesize 0x800
-sram_size 0x8000
+dev_type STM32F09x
+ref_manual_id 0091
+chip_id 0x442                // STLINK_CHIPID_STM32_F09x
+flash_type 1                 // STLINK_FLASH_TYPE_F0
+flash_size_reg 0x1ffff7cc
+flash_pagesize 0x800         // 2 KB
+sram_size 0x8000             // 32 KB
 bootrom_base 0x1fffd800
-bootrom_size 0x2000
-option_base 0x1ffff800
-option_size 0x10
+bootrom_size 0x2000          // 8 KB
+option_base 0x1ffff800       // STM32_F0_OPTION_BYTES_BASE
+option_size 0x10             // 16 B
 flags none
 

config/chips/F1xx_CL.chip

@@ -1,15 +1,15 @@
-# Chip-ID file for STM32F1xx CL device
+# Chip-ID file for STM32F1xx Connectivity Line device
 #
-dev_type STM32F1xx Connectivity Line device
+dev_type STM32F1xx_CL
 ref_manual_id 0008
 chip_id 0x418                // STLINK_CHIPID_STM32_F1_CONN
 flash_type 1                 // STLINK_FLASH_TYPE_F0
 flash_size_reg 0x1ffff7e0
-flash_pagesize 0x800
-sram_size 0x10000
+flash_pagesize 0x800         // 2 KB
+sram_size 0x10000            // 64 KB
 bootrom_base 0x1fffb000
-bootrom_size 0x4800
+bootrom_size 0x4800          // 18 KB
 option_base 0x1ffff800       // STM32_F0_OPTION_BYTES_BASE
-option_size 0x10             // 16
+option_size 0x10             // 16 B
 flags swo
 

config/chips/F1xx_HD.chip

@@ -1,14 +1,14 @@
 # Chip-ID file for STM32F1xx high density device
 #
-dev_type F1xx high density device
+dev_type F1xx_HD
 ref_manual_id 0008
 chip_id 0x414                // STLINK_CHIPID_STM32_F1_HD
 flash_type 1                 // STLINK_FLASH_TYPE_F0
 flash_size_reg 0x1ffff7e0
-flash_pagesize 0x800
-sram_size 0x10000
+flash_pagesize 0x800         // 2 KB
+sram_size 0x10000            // 64 KB
 bootrom_base 0x1ffff000
-bootrom_size 0x800
+bootrom_size 0x800           // 2 KB
 option_base 0x1ffff800       // STM32_F0_OPTION_BYTES_BASE
-option_size 0x10             // 16
+option_size 0x10             // 16 B
 flags swo

config/chips/F1xx_LD.chip

@@ -1,14 +1,14 @@
 # Chip-ID file for STM32F1 low density device
 #
-dev_type STM32F1xx low density device
+dev_type STM32F1xx_LD
 ref_manual_id 0008
 chip_id 0x412                // STLINK_CHIPID_STM32_F1_LD
 flash_type 1                 // STLINK_FLASH_TYPE_F0
 flash_size_reg 0x1ffff7e0
-flash_pagesize 0x400
-sram_size 0x2800
+flash_pagesize 0x400         // 1 KB
+sram_size 0x2800             // 10 KB
 bootrom_base 0x1ffff000
-bootrom_size 0x800
+bootrom_size 0x800           // 2 KB
 option_base 0x1ffff800       // STM32_F0_OPTION_BYTES_BASE
-option_size 0x10             // 16
+option_size 0x10             // 16 B
 flags swo

config/chips/F1xx_MD.chip

@@ -1,14 +1,14 @@
 # Chip-ID file for STM32F1xx medium density device
 #
-dev_type STM32F1xx medium density device
+dev_type STM32F1xx_MD
 ref_manual_id 0008
 chip_id 0x410                // STLINK_CHIPID_STM32_F1_MD
 flash_type 1                 // STLINK_FLASH_TYPE_F0
 flash_size_reg 0x1ffff7e0
-flash_pagesize 0x400
-sram_size 0x5000
-bootrom_base 0x1ffff000      // Section 2.3.3 "Embedded Flash memory"
-bootrom_size 0x800
+flash_pagesize 0x400         // 1 KB
+sram_size 0x5000             // 20 KB
+bootrom_base 0x1ffff000
+bootrom_size 0x800           // 2 KB
 option_base 0x1ffff800       // STM32_F0_OPTION_BYTES_BASE
-option_size 0x10             // 16
+option_size 0x10             // 16 B
 flags swo

config/chips/F1xx_VL_HD.chip

@@ -1,14 +1,14 @@
 # Chip-ID file for STM32F1xx high density Value Line device
 #
-dev_type STM32F1xx Value Line high density device
+dev_type STM32F1xx_VL_HD
 ref_manual_id 0041
 chip_id 0x428                // STLINK_CHIPID_STM32_F1_VL_HD
 flash_type 1                 // STLINK_FLASH_TYPE_F0
 flash_size_reg 0x1ffff7e0
-flash_pagesize 0x800
-sram_size 0x8000
+flash_pagesize 0x800         // 2 KB
+sram_size 0x8000             // 32 KB
 bootrom_base 0x1ffff000
-bootrom_size 0x800
+bootrom_size 0x800           // 2 KB
 option_base 0x1ffff800       // STM32_F0_OPTION_BYTES_BASE
-option_size 0x10             // 16
+option_size 0x10             // 16 B
 flags swo

config/chips/F1xx_VL_MD_LD.chip

@@ -1,14 +1,14 @@
 # Chip-ID file for STMF1xx Value Line medium & low density device
 #
-dev_type STM32F1xx Value Line medium & low density device
+dev_type STM32F1xx_VL_MD_LD
 ref_manual_id 0041
 chip_id 0x420                // STLINK_CHIPID_STM32_F1_VL_MD_LD
 flash_type 1                 // STLINK_FLASH_TYPE_F0
 flash_size_reg 0x1ffff7e0
-flash_pagesize 0x400
-sram_size 0x2000             // 0x1000 for low density devices
+flash_pagesize 0x400         // 1 KB
+sram_size 0x2000             // 8 KB /* 0x1000 for low density devices */
 bootrom_base 0x1ffff000
-bootrom_size 0x800
+bootrom_size 0x800           // 2 KB
 option_base 0x1ffff800       // STM32_F0_OPTION_BYTES_BASE
-option_size 0x10             // 16
+option_size 0x10             // 16 B
 flags swo

config/chips/F1xx_XLD.chip

@@ -1,14 +1,14 @@
 # Chip-ID file for STM32F1xx XL density device
 #
-dev_type STM32F1xx XL density device
+dev_type STM32F1xx_XLD
 ref_manual_id 0008
-chip_id 0x430              // STLINK_CHIPID_STM32_F1_XLD
-flash_type 2               // STLINK_FLASH_TYPE_F1_XL
+chip_id 0x430                // STLINK_CHIPID_STM32_F1_XLD
+flash_type 2                 // STLINK_FLASH_TYPE_F1_XL
 flash_size_reg 0x1ffff7e0
-flash_pagesize 0x800
-sram_size 0x18000
+flash_pagesize 0x800         // 2 KB
+sram_size 0x18000            // 96 KB
 bootrom_base 0x1fffe000
-bootrom_size 0x1800
+bootrom_size 0x1800          // 6 KB
 option_base 0x0
 option_size 0x0
 flags swo

config/chips/F2xx.chip

@@ -1,14 +1,14 @@
-# Chip-ID file for STM32F2xx device (STM32F205xx, STM32F207xx, STM32F215xx, STM32F217xx)
+# Chip-ID file for STM32F2xx device
 #
-dev_type STM32F2xx device
+dev_type STM32F2xx
 ref_manual_id 0033
 chip_id 0x411                // STLINK_CHIPID_STM32_F2
 flash_type 3                 // STLINK_FLASH_TYPE_F4
 flash_size_reg 0x1fff7a22
-flash_pagesize 0x20000
-sram_size 0x20000
+flash_pagesize 0x20000       // 128 KB
+sram_size 0x20000            // 128 KB
 bootrom_base 0x1fff0000
-bootrom_size 0x7800
+bootrom_size 0x7800          // 30 KB
 option_base 0x1fffc000       // STM32_F2_OPTION_BYTES_BASE
-option_size 0x4              // 4
+option_size 0x4              // 4 B
 flags swo

config/chips/F301_F302_F318.chip

@@ -1,13 +1,14 @@
-# Chip-ID file for F301/F302/F318
+# Chip-ID file for STM32F3xx device (F301x6/8, F302x6x8, F318x8)
 #
-chip_id 0x439
-description F301/F302/F318
-flash_type 1
-flash_pagesize 0x800
-sram_size 0xa000
+dev_type STM32F301_F302_F318
+ref_manual_id 0365           // also RM0366
+chip_id 0x439                // STLINK_CHIPID_STM32_F3xx_SMALL
+flash_type 1                 // STLINK_FLASH_TYPE_F0
+flash_size_reg 0x1ffff7cc
+flash_pagesize 0x800         // 2 KB
+sram_size 0xa000             // 40 KB
 bootrom_base 0x1fffd800
-bootrom_size 0x2000
-option_base 0x1ffff800
-option_size 0x10
+bootrom_size 0x2000          // 8 KB
+option_base 0x1ffff800       // STM32_F0_OPTION_BYTES_BASE
+option_size 0x10             // 16 B
 flags swo
-

config/chips/F302_F303_F358.chip

@@ -1,13 +1,14 @@
-# Chip-ID file for F302/F303/F358
+# Chip-ID file for STM32F3xx device (F302xBxC, F303xB/C, F358)
 #
-chip_id 0x422
-description F302/F303/F358
-flash_type 1
-flash_pagesize 0x800
-sram_size 0xa000
+dev_type STM32F302_F303_358
+ref_manual_id 0365           // also RM0316
+chip_id 0x422                // STLINK_CHIPID_STM32_F3
+flash_type 1                 // STLINK_FLASH_TYPE_F0
+flash_size_reg 0x1ffff7cc
+flash_pagesize 0x800         // 2 KB
+sram_size 0xa000             // 40 KB
 bootrom_base 0x1ffff000
-bootrom_size 0x800
-option_base 0x1ffff800
-option_size 0x10
+bootrom_size 0x800           // 2 KB
+option_base 0x1ffff800       // STM32_F0_OPTION_BYTES_BASE
+option_size 0x10             // 16 B
 flags swo
-

config/chips/F302_F303_F398_HD.chip

@@ -0,0 +1,14 @@
+# Chip-ID file for STM32F3xx high density device (F302xD/E, F303xD/E, F398xE)
+#
+dev_type STM32F302_F303_F398_HD
+ref_manual_id 0365           // also RM0316 (Rev 5)
+chip_id 0x446                // STLINK_CHIPID_STM32_F303_HD
+flash_type 1                 // STLINK_FLASH_TYPE_F0
+flash_size_reg 0x1ffff7cc
+flash_pagesize 0x800         // 2 KB
+sram_size 0x10000            // 64 KB
+bootrom_base 0x1fffd800
+bootrom_size 0x2000          // 8 KB
+option_base 0x1ffff800       // STM32_F0_OPTION_BYTES_BASE
+option_size 0x10             // 16 B
+flags swo

config/chips/F303_F328_F334.chip

@@ -1,13 +1,14 @@
-# Chip-ID file for F303/F328/F334
+# Chip-ID file for STM32F3xx device (F303x6/8, F328, F334)
 #
-chip_id 0x438
-description F303/F328/F334
-flash_type 1
-flash_pagesize 0x800
-sram_size 0x3000
+dev_type STM32F303_F328_F334
+ref_manual_id 0364           // also RM0316
+chip_id 0x438                // STLINK_CHIPID_STM32_F334
+flash_type 1                 // STLINK_FLASH_TYPE_F0
+flash_size_reg 0x1ffff7cc
+flash_pagesize 0x800         // 2 KB
+sram_size 0x3000             // 12 KB
 bootrom_base 0x1fffd800
-bootrom_size 0x2000
-option_base 0x1ffff800
-option_size 0x10
+bootrom_size 0x2000          // 8 KB
+option_base 0x1ffff800       // STM32_F0_OPTION_BYTES_BASE
+option_size 0x10             // 16 B
 flags swo
-