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Add support for reading and writing to the Backup Data Register (#83). #86

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merged 3 commits into from
Aug 9, 2019

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mjepronk
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This is my first attempt at fixing issue #83.

@TheZoq2
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TheZoq2 commented Jul 16, 2019

Thanks for the PR, it looks good to me, and most of my comments are "bikeshedding"

I'm not sure how I feel about panic! when indexing out of bouds as panics can be a pain to debug on embedded platforms. Since reg 0 doesn't exist, those errors would probably be pretty common as well.
On the other hand, data registers are something that never changes, so it should be fairly simple to catch the panic in a debugger.

Another option might be to ignore the names of the registers and make the indexes 0 based in the API. As far as I know, no other systems in the processor depends on data in these registers so where we put "1" won't make a difference.

Whichever option we go with, it would be nice with a more clear comment saying which range of registers are available.

Since I'm bikeshedding already, I think I would prefer read_data_register over read_bkp_dr. Most of the functions in the rest of the crate avoids abbreviated names.

Finally, could you add a line to CHANGELOG.md saying that this feature has been implemented?

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@mjepronk
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No problem, bikeshedding is fine.
I'll change the function names to read_data_register and write_data_register.
I'll add a line to CHANGELOG.md.
What do the others think of the register: u8 argument, zero or one based index?
What do you think of the array based functions?

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@therealprof
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What do the others think of the register: u8 argument, zero or one based index?

0 based. I'm just not so sure about the u8, maybe it would be better to make it usize for compatibility with general indexing operations.

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@therealprof
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Hm, just noticed that travis failed for STM32F100 and STM32F101; are the SVD files broken and/or do we need to need to feature gate the backup domain stuff for STM32F103 and higher?

@burrbull
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Hm, just noticed that travis failed for STM32F100 and STM32F101; are the SVD files broken and/or do we need to need to feature gate the backup domain stuff for STM32F103 and higher?

stm32-rs have regression. STM32F103 and other have different types.
I've fixed it in stm32-rs/stm32-rs#256

@mjepronk
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I've found that the BKP_DR11 to BKP_DR42 registers do not work (writing a value to them and reading afterwards gives back 0). I already found that they used a different naming convention in the STM32F1 crate. Does anybody know more about this?

@burrbull
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I've found that the BKP_DR11 to BKP_DR42 registers do not work (writing a value to them and reading afterwards gives back 0). I already found that they used a different naming convention in the STM32F1 crate. Does anybody know more about this?

It can be problem of incorrect BKP register address:
изображение

изображение

@burrbull
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stm32-rs/stm32-rs@58f8163
should fix problem

@burrbull
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Related issue in old repo:
japaric/stm32f103xx#18

@mjepronk
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mjepronk commented Jul 16, 2019

@burrbull Thanks, I have tried your change and I saw that you've renamed bkp_dr11 - bkp_dr42 to dr11 - dr42, great! But they still don't work. Also, dr1 does not seem to work either...

I'll update this PR with my latest code. The code I'm using to test is:

        let mut buf_w: [u16; 42] = [0; 42];
        for (i, d) in buf_w.iter_mut().enumerate() {
            *d = (i + 1) as u16;
        }
        backup_domain.write_data_register_array(&buf_w, 0);

        let mut buf_r: [u16; 42] = [0; 42];
        backup_domain.read_data_register_array(&mut buf_r, 0);

        for (i, (w, r)) in buf_w.iter().zip(buf_r.iter()).enumerate() {
            if w != r {
                hprintln!("{}: ERR w: {} ≠ r: {}", i, w, r).unwrap();
            }
        }

Update: I've pushed the code to this PR. Please note that it requires the latest master from stm32-rs repository to build successfully (because of name changes from bkp_dr11 to dr11 etc).
Update 2: Improved my testing code...

@burrbull
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burrbull commented Jul 16, 2019

With this change dr will be array.
So you don't need match.
Access with dr[i] and bkp_dr[j]
where i = 0..9 j = 0..31

@mjepronk
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Aah, I'm sorry for the trouble, thanks. Why do we split into dr and bkp_dr? Should we reflect this divide in the API we're defining here too?

@burrbull
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    pub fn read_data_register(&self, register: usize) -> u16 {
        match register {
            1..10  => read_drx!(self, dr, register-1),
            11..42 =>  read_drx!(self, bkp_dr, register-11)
             _=> unreachable!()
        }
   }

@burrbull
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burrbull commented Jul 16, 2019

Aah, I'm sorry for the trouble, thanks. Why do we split into dr and bkp_dr? Should we reflect this divide in the API we're defining here too?

Because svd2rust still not support deriving for registers:
Waiting for:
rust-embedded/svd2rust#256

dr's splitted on 2 regions, so these 2 arrays must have different names anyway.

src/backup_domain.rs Outdated Show resolved Hide resolved
macro_rules! write_drx {
($self:ident, $drx:ident, $idx:expr, $new:expr) => {{
unsafe {
$self._regs.$drx[$idx].write(|w| w.bits($new.into()));
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$self._regs.$drx[$idx].write(|w| w.d().bits($new));
And and unsafe is not needed.

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Apparently, I still need unsafe. I've added the .d() part.

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@mjepronk mjepronk changed the title Adds support for reading and writing to the Backup Data Register (#83). Add support for reading and writing to the Backup Data Register (#83). Jul 17, 2019
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@mjepronk
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OK, so the following points are open:

  • We should decide if we want to prevent people with low- or medium density STM32's of using the registers DR11-DR42 at compile time. Right now, reading always returns 0 and writing is a noop on these devices.
  • The PR for the stm32-rs repository from burrbull needs to be merged (and released?) before it makes sense to merge this code.
  • There is still code in stm32-rs repository that requires unsafe to write to either bkp or bkp_dr. See burrbull's review comments.

Let me know if there is still something I can do!

@burrbull
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I think we should split each function on low/high variant, where first one will operate on dr and second feature gated function will operate on bkp_dr.

@TheZoq2
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TheZoq2 commented Jul 17, 2019

We should decide if we want to prevent people with low- or medium density STM32's of using the registers DR11-DR42 at compile time. Right now, reading always returns 0 and writing is a noop on these devices.

I'm not a fan of runtime checks, so I'd prefer a feature gate. If we do do runtime checks, i'd prefer some sort of error over returning valid looking data like 0

I think we should split each function on low/high variant, where first one will operate on dr and second feature gated function will operate on bkp_dr.

I like this solution

@mjepronk
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OK, I separated the functions in _low and _high.

I dropped the array / buffer functions, because I think it would introduce to much functions for just the backup register. But I think this code is very straightforward to implement by the library user. Also they are not always practical (for example if I want to store a u32 in the backup data register, I would have to go from a u32 to an array of 2 u16's anyway). If you want them back, shout out!

I'm not sure how to do the feature gate:

  • low/medium or high/xl density?
  • stm32f101, stm32f102, ..? or
  • high-backup-register?

Sorry, for the lots of back- and forward...

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@mjepronk
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What do we do with the feature gate?
When will a new version of stm32f1 be released?
What else is in the way of merging this?

@burrbull
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You can add #[cfg(feature="stm32f107")].

@adamgreig promised make release this weekend.

@mjepronk
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That feature does not exist, right? Besides, I see that it depends on model number and on the amount of flash memory:

Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx
microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes.
Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx
microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes.
High-density devices are STM32F101xx and STM32F103xx microcontrollers where the
Flash memory density ranges between 256 and 512 Kbytes.
XL-density devices are STM32F101xx and STM32F103xx microcontrollers where the
Flash memory density ranges between 768 Kbytes and 1 Mbyte.
Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers.

The 84-byte data registers are only available in high-density, XL-density and connectivity line devices.

@burrbull
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One of the solution is to add feature gate for each type of microcontroller: stm32f1xxxx (stm32f103c8). They can depend on other features like mem64.
But not everyone likes this solution.

@TheZoq2
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TheZoq2 commented Jul 28, 2019

One of the solution is to add feature gate for each type of microcontroller: stm32f1xxxx (stm32f103c8). They can depend on other features like mem64.
But not everyone likes this solution.

That seems like a pretty reasonable solution to me, but I haven't heard the arguments against it

@burrbull
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I can make initial PR with these features.

@therealprof
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@TheZoq2 One of the arguments against it is that we'd have to maintain a database of details even most users will not even know or care about. I'm okay with having features for medium, high, xl and and connectivity lines with low being implied if none of the higher features are selected.

@burrbull
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@mjepronk please, rebase your changes.

@mjepronk
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mjepronk commented Jul 29, 2019

@burrbull I think my repo was already up-to-date, but I've bumped the dependency stm32f1 to version 0.8 (because your work on that repo is required for this PR).

@burrbull
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This repo is already on 0.8 #88 :)

@mjepronk
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Doh, sorry. I've merged...

@therealprof
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@mjepronk How about a rebase? 😉

@mjepronk
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@therealprof @burrbull Done, sorry for the confusion. I didn't do the push --force the first time.

@TheZoq2
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TheZoq2 commented Jul 29, 2019

This looks good to me, do we want to wait for #90 before merging?

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@TheZoq2
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TheZoq2 commented Aug 4, 2019

@mjepronk #90 has been merged which should be the last blocker for this, could you add the correct features for this?

@mjepronk
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mjepronk commented Aug 5, 2019

Yes, I will pick this up ASAP. Thanks!

@mjepronk
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mjepronk commented Aug 9, 2019

Is there anything left to do before we can merge this?

@TheZoq2
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TheZoq2 commented Aug 9, 2019

Nope, I just missed the new pushed commits, thanks!

Also, I feel like it's time for another release, any objections to that? @therealprof

@TheZoq2 TheZoq2 merged commit 9f08026 into stm32-rs:master Aug 9, 2019
@therealprof
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@TheZoq2 No objections.

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TheZoq2 commented Aug 9, 2019

Cool, version 0.4.0 has been published 🎉

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4 participants