Skip to content

Commit

Permalink
Update changelog
Browse files Browse the repository at this point in the history
  • Loading branch information
arlosi committed Mar 5, 2020
1 parent 50ec7c6 commit 0e2624b
Showing 1 changed file with 3 additions and 0 deletions.
3 changes: 3 additions & 0 deletions CHANGELOG.md
Original file line number Diff line number Diff line change
Expand Up @@ -13,6 +13,9 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
- Implement blocking Write for UART
- Implement blocking Read for I2C

### Fixed
- Regression in v0.4.0 that set SPI to LSB-first ordering

## [v0.4.0] - 2019-12-27

### Added
Expand Down

0 comments on commit 0e2624b

Please sign in to comment.