Use gpio variants #42
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Sh3Rm4n
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Now that stm32f3 v0.10 is released, this builds for all stm3f3xx targets again. This blows up the macros in the gpio module to a large extent, but the code itself should be simplified. I would keep it like that for now. When the field array support is released under a new svd2rust version and stm32f3 will use it in the next release, this code could be simplified a lot. When this happens, i will open a follow up PR. |
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Hey @Sh3Rm4n, could you rebase to resolve the conflicts? |
teskje
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Jul 15, 2020
stm32f3 provides methods, with which we can access each variant of a register. No more bit-shifts and -masks are needed. This also removes a lot off `unsafe` calls, which where needed before to access a whole register without any bound guards for fields and flags. This makes the macro section quite more verbose, because there is no method with an array index access-point. So we have to be explicit for every method name we add. `moder0`, `moder1`, ...
teskje
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Jul 17, 2020
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Looks good, thanks! |
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Jul 17, 2020
This commit: - Makes the order of InputPin impls consistent - Impls InputPin only for Output<OpenDrain>, not the generic Output<MODE> - Adjusts the register access in accordance with the recently merged GPIO refactoring (stm32-rs#42) - Makes rustfmt happy
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This PR upgrades to variant methods for the gpio module.
Doing this I had to extend the macro invocations significantly.
Also, I found no elegant way to apply this to the downgradable pins, as the pin register field access is determined via
"runtime".
rust-embedded/svd2rust#400 could help with that.
Also, for the
stm32f3x8andstm32f373series, this can not be applied right now, as they are missing a gpio documentation.stm32-rs/stm32-rs#321 will add these.