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WIP: add InputPin trait to output pins #88

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@peter-wilkins peter-wilkins commented Apr 6, 2020

Closes #84

This builds and runs (I'm not getting a reading from sensor but that is probably some other issue like my wiring)

Out of curiosity, I've updated into_open_drain_output with the api from stm32f4 library which is simpler imo. Aware this is a breaking change so should probably not do this :)

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Thank you overall for this PR :) My requests are minor nitpicks. So they should be easy to address. If you have questions feel free to ask.

@@ -699,6 +695,19 @@ macro_rules! gpio {

#[cfg(feature = "unproven")]
impl<MODE> toggleable::Default for $PXi<Output<MODE>> {}

impl<MODE> InputPin for $PXi<Output<MODE>> {
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Almost done, this also has to be implemented at line 231 for PXx which is a "fully reased pin", line 425 $PXx, which is a partially erase pin. :) The implementation is almost the same. The compiler will scream the difference to you, or you could look at the other implementations 😉

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Minor nitpick: I think I would move this below

                    impl<MODE> OutputPin for $PXi<Output<MODE>> {

at line 668, because this is another implementation for Output, so this position would make more sense.

let mode = 0b01;
moder.moder().modify(|r, w| unsafe {
w.bits((r.bits() & !(0b11 << offset)) | (mode << offset))
pub fn into_open_drain_output(self) -> $PXi<Output<OpenDrain>> {
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Breaking changes in itself are fine. But changing only this, would mean other parts which take the moder and otyper register must be changed as well, to make it coherent.

We had a discussion about this a while ago in #37. I've no opinion on this, but I'd rather tackle that as whole in another PR :)

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I agree, we should do this in a separate PR.

But also this implementation here is not safe. The reason we pass &mut references for the relevant GPIO registers in is that this way we can ensure (at compile time) that we have exclusive access to them. We need this, because otherwise race conditions can happen, as explained in #37. To make this safe we'd need something else that ensures exclusive access, like a critical section.

Comment on lines +700 to 711
type Error = ();

fn is_high(&self) -> Result<bool, Self::Error> {
self.is_low().map(|v| !v)
}

fn is_low(&self) -> Result<bool, Self::Error> {
// NOTE(unsafe) atomic read with no side effects
Ok(unsafe { (*$GPIOX::ptr()).idr.read().bits() & (1 << $i) == 0 })
}
}
)+
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Suggested change
type Error = ();
fn is_high(&self) -> Result<bool, Self::Error> {
self.is_low().map(|v| !v)
}
fn is_low(&self) -> Result<bool, Self::Error> {
// NOTE(unsafe) atomic read with no side effects
Ok(unsafe { (*$GPIOX::ptr()).idr.read().bits() & (1 << $i) == 0 })
}
}
)+
type Error = ();
fn is_high(&self) -> Result<bool, Self::Error> {
self.is_low().map(|v| !v)
}
fn is_low(&self) -> Result<bool, Self::Error> {
// NOTE(unsafe) atomic read with no side effects
Ok(unsafe { (*$GPIOX::ptr()).idr.read().bits() & (1 << $i) == 0 })
}
}
)+

Indentation is wrong. I wonder why rustfmt did not complaint 🤔

@Sh3Rm4n Sh3Rm4n changed the title WIP: add InputPin train to output pins WIP: add InputPin trait to output pins May 6, 2020
@teskje teskje closed this Jul 18, 2020
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teskje commented Jul 18, 2020

Closed in favor of #114.

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Implement InputPin trait for PA1<Output<OpenDrain>>
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