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Feature gate L register
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Johannes Draaijer committed May 19, 2021
1 parent 53c64c3 commit 20f5a18
Showing 1 changed file with 24 additions and 3 deletions.
27 changes: 24 additions & 3 deletions src/adc.rs
Original file line number Diff line number Diff line change
Expand Up @@ -316,21 +316,42 @@ impl ADC {

/// Get the configured sequence length (= `actual sequence length - 1`)
pub(crate) fn get_sequence_length(&self) -> u8 {
self.adc.sqr1.read().l3().bits()
#[cfg(not(feature = "stm32l4x6"))]
{
self.adc.sqr1.read().l3().bits()
}
#[cfg(feature = "stm32l4x6")]
{
self.adc.sqr1.read().l().bits()
}
}

/// Private: length must be `actual sequence length - 1`, so not API-friendly.
/// Use [`ADC::reset_sequence`] and [`ADC::configure_sequence`] instead
fn set_sequence_length(&mut self, length: u8) {
self.adc.sqr1.modify(|_, w| unsafe { w.l3().bits(length) });
#[cfg(not(feature = "stm32l4x6"))]
{
self.adc.sqr1.modify(|_, w| unsafe { w.l3().bits(length) });
}
#[cfg(feature = "stm32l4x6")]
{
self.adc.sqr1.modify(|_, w| unsafe { w.l().bits(length) });
}
}

/// Reset the sequence length to 1
///
/// Does *not* erase previously configured sequence settings, only
/// changes the sequence length
pub fn reset_sequence(&mut self) {
self.adc.sqr1.modify(|_, w| unsafe { w.l3().bits(0b0000) })
#[cfg(not(feature = "stm32l4x6"))]
{
self.adc.sqr1.modify(|_, w| unsafe { w.l3().bits(0b0000) })
}
#[cfg(feature = "stm32l4x6")]
{
self.adc.sqr1.modify(|_, w| unsafe { w.l().bits(0b0000) })
}
}

pub fn has_completed_conversion(&self) -> bool {
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