corrected EXIRQ control register flags

stnolting · Mar 31, 2020 · 879c4b8 · 879c4b8
1 parent c0af028
commit 879c4b8
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Showing 2 changed files with 16 additions and 16 deletions.
diff --git a/rtl/core/neo430_exirq.vhd b/rtl/core/neo430_exirq.vhd
@@ -71,12 +71,12 @@ end neo430_exirq;
 architecture neo430_exirq_rtl of neo430_exirq is
 
   -- control register bits --
-  constant ctrl_irq_sel0_c : natural :=  0; -- r/w: IRQ source bit 0 (r); SW IRQ select / ACK select (w)
-  constant ctrl_irq_sel1_c : natural :=  1; -- r/w: IRQ source bit 1 (r); SW IRQ select / ACK select (w)
-  constant ctrl_irq_sel2_c : natural :=  2; -- r/w: IRQ source bit 2 (r); SW IRQ select / ACK select (w)
+  constant ctrl_irq_sel0_c : natural :=  0; -- r/w: IRQ source bit 0 (r); SW IRQ select (w)
+  constant ctrl_irq_sel1_c : natural :=  1; -- r/w: IRQ source bit 1 (r); SW IRQ select (w)
+  constant ctrl_irq_sel2_c : natural :=  2; -- r/w: IRQ source bit 2 (r); SW IRQ select (w)
   constant ctrl_en_c       : natural :=  3; -- r/w: unit enable
   constant ctrl_sw_irq_c   : natural :=  4; -- -/w: use irq_sel as SW IRQ trigger, auto-clears
-  constant ctrl_ack_irq_c  : natural :=  5; -- -/w: use irq_sel as ACK select, auto-clears
+  constant ctrl_ack_irq_c  : natural :=  5; -- -/w: ACK current IRQ, auto-clears
   -- ...
   constant ctrl_en_irq0_c  : natural :=  8; -- r/w: IRQ channel 0 enable
   constant ctrl_en_irq1_c  : natural :=  9; -- r/w: IRQ channel 1 enable
@@ -175,6 +175,9 @@ begin
   irq_core: process(clk_i)
   begin
     if rising_edge(clk_i) then
+      -- ack output --
+      ext_ack_o <= ack_mask;
+
       -- irq buffer --
       for i in 0 to 7 loop
         -- keep requests until they are acknowledged
@@ -184,20 +187,17 @@ begin
 
       -- mini state FSM - defaults --
       cpu_irq_o <= '0';
-      ext_ack_o <= (others => '0');
-
       -- mini state FSM --
       if (state = '0') or (enable = '0') then -- idle or deactivated
         state       <= '0';
         irq_src_reg <= irq_src; -- capture source
         if (irq_fire = '1') then
-          cpu_irq_o <= '1'; -- trigger CPU
+          cpu_irq_o <= '1'; -- trigger CPU interrupt
           state     <= '1'; -- go to active IRQ state
         end if;
       else -- active IRQ
-        if (ack_trig = '1') then 
-          ext_ack_o <= ack_mask;
-          state     <= '0';
+        if (ack_trig = '1') or (enable = '0') then 
+          state <= '0';
         end if;
       end if;
     end if;
@@ -219,10 +219,10 @@ begin
 
   -- ACK priority decoder -----------------------------------------------------
   -- -----------------------------------------------------------------------------
-  ack_priority_dec: process(ack_trig, irq_src_reg)
+  ack_priority_dec: process(state, ack_trig, irq_src_reg)
     variable irq_ack_v : std_ulogic_vector(3 downto 0);
   begin
-    irq_ack_v := ack_trig & irq_src_reg;
+    irq_ack_v := (ack_trig and state) & irq_src_reg;
     case irq_ack_v is
       when "1000" => ack_mask <= "00000001";
       when "1001" => ack_mask <= "00000010";

diff --git a/sw/lib/neo430/include/neo430.h b/sw/lib/neo430/include/neo430.h
@@ -218,7 +218,7 @@
 // ----------------------------------------------------------------------------
 #define TMR_CT    (*(REG16 0xFFB0)) // r/w: control register
 #define TMR_CNT   (*(ROM16 0xFFB2)) // r/-: counter register
-#define TMR_THRES (*(REG16 0xFFB4)) // r/w: threshold register
+#define TMR_THRES (*(REG16 0xFFB4)) // -/w: threshold register
 #define TMR_NCO   (*(REG16 0xFFB6)) // -/w: frequency generator
 
 // Timer control register
@@ -401,9 +401,9 @@
 #define EXIRQ_CT (*(REG16 0xFFEE)) // r/w: control register
 
 // EXIRQ control register
-#define EXIRQ_CT_SEL0         0 // r/w: IRQ source bit 0 / SW_IRQ select / ACK select
-#define EXIRQ_CT_SEL1         1 // r/w: IRQ source bit 1 / SW_IRQ select / ACK select
-#define EXIRQ_CT_SEL2         2 // r/w: IRQ source bit 2 / SW_IRQ select / ACK select
+#define EXIRQ_CT_SEL0         0 // r/w: IRQ source bit 0 / SW_IRQ select
+#define EXIRQ_CT_SEL1         1 // r/w: IRQ source bit 1 / SW_IRQ select
+#define EXIRQ_CT_SEL2         2 // r/w: IRQ source bit 2 / SW_IRQ select
 #define EXIRQ_CT_EN           3 // r/w: unit enable
 #define EXIRQ_CT_SW_IRQ       4 // -/w: use irq_sel as SW IRQ trigger, auto-clears
 #define EXIRQ_CT_ACK_IRQ      5 // -/w: use irq_sel as ACK select, auto-clears