Direction field of spgw source interface table is optimized out causing read/write asymmetry

[ccascone]

When reading from device direction is always 0x0. The Stratum log suggests it's one of those cases where the compiler optimizes out action arguments that write to unused PHVs.

19:56:55.347 WARN [P4RuntimeFlowRuleProgrammable] Table entry obtained from device device:leaf1 is different from one in in translation store: device=PiTableEntry{tableId=FabricIngress.spgw_ingress.interface_lookup, matchKey={ipv4_dst_addr=0xc0a8fb01/32, gtpu_is_valid=0x1}, tableAction=FabricIngress.spgw_ingress.set_source_iface(skip_spgw=0x0, src_iface=0x1, direction=0x0), priority=N/A, timeout=PERMANENT}, store=PiTableEntry{tableId=FabricIngress.spgw_ingress.interface_lookup, matchKey={ipv4_dst_addr=0xc0a8fb01/32, gtpu_is_valid=0x1}, tableAction=FabricIngress.spgw_ingress.set_source_iface(skip_spgw=0x0, src_iface=0x1, direction=0x1), priority=N/A, timeout=PERMANENT}
19:56:55.348 WARN [P4RuntimeFlowRuleProgrammable] Table entry obtained from device device:leaf1 is different from one in in translation store: device=PiTableEntry{tableId=FabricIngress.spgw_ingress.interface_lookup, matchKey={ipv4_dst_addr=0xafa0000/16, gtpu_is_valid=0x0}, tableAction=FabricIngress.spgw_ingress.set_source_iface(skip_spgw=0x0, src_iface=0x2, direction=0x0), priority=N/A, timeout=PERMANENT}, store=PiTableEntry{tableId=FabricIngress.spgw_ingress.interface_lookup, matchKey={ipv4_dst_addr=0xafa0000/16, gtpu_is_valid=0x0}, tableAction=FabricIngress.spgw_ingress.set_source_iface(skip_spgw=0x0, src_iface=0x2, direction=0x2), priority=N/A, timeout=PERMANENT}

[pudelkoM]

Seems right. There's no write to fabric_md.spgw_direction:

[pudelkoM]

In fact, the whole flexible_pdr_lookup table is removed.

[ccascone]

Re-opening so we don't forget to fix the issue in the original PR #81 . Changes for the now reverted PR are in the simpleBuffering branch. @robertmacdavid feel free to fix the issue in that branch and open a new PR.

[ccascone]

Fixed in #113