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PacketOut based on L2 header #40
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My only nit is that I would prefer the 16 bit egress_port
be split into 9 port bits and 7 padding bits.
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Added WIP label, as this cannot be merged until the Java part is updated as well. |
bfrt returns error when trying to install clone groups for quad-pipe ports on a dual-pipe chip. For now, we decide whether to install 4 or 2 sessions based on the pipeconf name. This is a temporary workaround, as it prevents us from using chip-independent pipeconfs (#40). Ideally, we should be able to use gNMI to retrieve the chip type or platform name.
Can one of the admins verify this patch? |
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src/main/java/org/stratumproject/fabric/tna/behaviour/pipeliner/FabricPipeliner.java
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src/main/java/org/stratumproject/fabric/tna/behaviour/pipeliner/FabricPipeliner.java
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These PTF test currently fail:
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@controller_header("packet_out") | ||
header packet_out_header_t { | ||
PortId_t egress_port; | ||
CpuLoopbackMode_t cpu_loopback_mode; | ||
bit<5> _pad0; | ||
@padding bit<85> pad0; |
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Adding a _
prefix excludes the parameter from the auto-generated java constants.
Include padding fields in PacketOuts Address comments Remove last instances of CPU_PORT from P4 code Move tmp variable to inner scope Remove unncessary skip assignment Add padding fields when creating metadata [DO NOT MERGE] Add metadata flag to detect to cpu in egress. This code does not work, as it can not distinguish between the orginal packet in case of clone_to_cpu or multicast groups with instance 0. Remove unnecessary check on CPU_PORT in INT control Integrate with loopback header in parser Fix parse_packet_out next transition typo Handle cpu ports with a keyless table populated at runtime Move switch info table to egress pipeline Fix createPacketMetadata Fix PacketOut tests Initialize the switch info table on module init Remove header size split workaround for Stratum Remove padding Add missing application ID and priority Remove app id constant Remove unnecessary parser args Remove unneeded constants Small fixes Fix pipeconf for new packetout header format Initialize cpu_port in egress metadata to zero Rename ETHERTYPE_PACKET_IO to ETHERTYPE_PACKET_OUT Use braindamage (hungarian) notation for variable names
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src/main/java/org/stratumproject/fabric/tna/behaviour/pipeliner/FabricPipeliner.java
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Codecov Report
@@ Coverage Diff @@
## master #40 +/- ##
============================================
- Coverage 66.90% 66.26% -0.65%
Complexity 199 199
============================================
Files 17 17
Lines 1538 1571 +33
Branches 122 122
============================================
+ Hits 1029 1041 +12
- Misses 427 448 +21
Partials 82 82
Continue to review full report at Codecov.
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ptf/tests/ptf/fabric_test.py
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@@ -44,6 +44,7 @@ | |||
ETH_TYPE_PPPOE = 0x8864 | |||
ETH_TYPE_MPLS_UNICAST = 0x8847 | |||
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ETH_TYPE_PACKET_IO = 0xBF01 |
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ETH_TYPE_PACKET_IO = 0xBF01 | |
ETHERTYPE_PACKET_OUT = 0xBF01 |
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What's the reason to go against all other instances that use the ETH_TYPE_*
naming scheme?
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Ah, this about IO vs OUT
@@ -53,6 +53,7 @@ | |||
private static final int CPU_LOOPBACK_MODE_DISABLED = 0; | |||
private static final int CPU_LOOPBACK_MODE_DIRECT = 1; | |||
private static final int CPU_LOOPBACK_MODE_INGRESS = 2; | |||
private static final int ETHER_TYPE_PACKET_IO = 0xBF01; |
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private static final int ETHER_TYPE_PACKET_IO = 0xBF01; | |
private static final int ETHERTYPE_PACKET_OUT = 0xBF01; |
@pudelkoM while we wait for Jenkins to approve, and before we can merge, it would be nice if you could update the PR description with a more meaningful description of the change. Thanks! |
Makes the P4 program Tofino chip model independent by removing the dependency on the cpu port at compile time. Instead this information is inserted at runtime by the controller into the switch_info table, and stored in the metadata for usage in the egress stages. To remove the dependency in the ingress parser (to detect PacketOuts from dataplane packets), we now use a special Ethertype in the serialized metadata header of PacketOuts.
Makes the P4 program Tofino chip model independent by removing the dependency on the cpu port at compile time. Instead this information is inserted at runtime by the controller into the switch_info table, and stored in the metadata for usage in the egress stages. To remove the dependency in the ingress parser (to detect PacketOuts from dataplane packets), we now use a special Ethertype in the serialized metadata header of PacketOuts.
Makes the P4 program Tofino chip model independent by removing the dependency on the cpu port at compile time. Instead this information is inserted at runtime by the controller into the switch_info table, and stored in the metadata for usage in the egress stages. To remove the dependency in the ingress parser (to detect PacketOuts from dataplane packets), we now use a special Ethertype in the serialized metadata header of PacketOuts.
Makes the P4 program Tofino chip model independent by removing the dependency on the cpu port at compile time. Instead this information is inserted at runtime by the controller into the switch_info table, and stored in the metadata for usage in the egress stages. To remove the dependency in the ingress parser (to detect PacketOuts from dataplane packets), we now use a special Ethertype in the serialized metadata header of PacketOuts.
This PR makes the program Tofino chip model independent by removing the dependency on the cpu port at compile time.
Instead this information is inserted at runtime by the controller into the
switch_info
table, and stored in the metadata for usage in the egress stages. To remove the dependency in the ingress parser (to detect PacketOuts from dataplane packets), we now use a special Ethertype in the serialized metadata header of PacketOuts.TODOs: