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PacketOut based on L2 header #40

Merged
merged 7 commits into from
Sep 21, 2020
Merged

PacketOut based on L2 header #40

merged 7 commits into from
Sep 21, 2020

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pudelkoM
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@pudelkoM pudelkoM commented Aug 11, 2020

This PR makes the program Tofino chip model independent by removing the dependency on the cpu port at compile time.
Instead this information is inserted at runtime by the controller into the switch_info table, and stored in the metadata for usage in the egress stages. To remove the dependency in the ingress parser (to detect PacketOuts from dataplane packets), we now use a special Ethertype in the serialized metadata header of PacketOuts.

TODOs:

  • Add init code for switch config (cpu port) in pipeliner
  • Fix PTF tests

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My only nit is that I would prefer the 16 bit egress_port be split into 9 port bits and 7 padding bits.

@pudelkoM pudelkoM force-pushed the packet-out-l2-header branch 2 times, most recently from 329bcc3 to d86274f Compare August 11, 2020 18:18
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@pudelkoM pudelkoM changed the title [WIP] PacketOut based on L2 header PacketOut based on L2 header Aug 12, 2020
@ccascone ccascone added the WIP Do not merge! label Aug 12, 2020
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Added WIP label, as this cannot be merged until the Java part is updated as well.

ccascone added a commit that referenced this pull request Aug 14, 2020
bfrt returns error when trying to install clone groups for quad-pipe
ports on a dual-pipe chip. For now, we decide whether to install 4 or 2
sessions based on the pipeconf name. This is a temporary workaround, as
it prevents us from using chip-independent pipeconfs (#40). Ideally, we
should be able to use gNMI to retrieve the chip type or platform name.
Base automatically changed from int-support-report-inner-flow to master August 17, 2020 06:39
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ghost commented Aug 18, 2020

Can one of the admins verify this patch?

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@stratum stratum deleted a comment from ccascone Aug 19, 2020
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These PTF test currently fail:

The following tests failed:
FabricIpv4UnicastLoopbackModeTest, FabricPacketInLoopbackModeTest, FabricPacketOutLoopbackModeTest

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@controller_header("packet_out")
header packet_out_header_t {
PortId_t egress_port;
CpuLoopbackMode_t cpu_loopback_mode;
bit<5> _pad0;
@padding bit<85> pad0;
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Adding a _ prefix excludes the parameter from the auto-generated java constants.

Include padding fields in PacketOuts

Address comments

Remove last instances of CPU_PORT from P4 code

Move tmp variable to inner scope

Remove unncessary skip assignment

Add padding fields when creating metadata

[DO NOT MERGE] Add metadata flag to detect to cpu in egress.

This code does not work, as it can not distinguish between the orginal packet in case of clone_to_cpu or multicast groups with instance 0.

Remove unnecessary check on CPU_PORT in INT control

Integrate with loopback header in parser

Fix parse_packet_out next transition typo

Handle cpu ports with a keyless table populated at runtime

Move switch info table to egress pipeline

Fix createPacketMetadata

Fix PacketOut tests

Initialize the switch info table on module init

Remove header size split workaround for Stratum

Remove padding

Add missing application ID and priority

Remove app id constant

Remove unnecessary parser args

Remove unneeded constants

Small fixes

Fix pipeconf for new packetout header format

Initialize cpu_port in egress metadata to zero

Rename ETHERTYPE_PACKET_IO to ETHERTYPE_PACKET_OUT

Use braindamage (hungarian) notation for variable names
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codecov bot commented Sep 18, 2020

Codecov Report

Merging #40 into master will decrease coverage by 0.64%.
The diff coverage is 34.37%.

Impacted file tree graph

@@             Coverage Diff              @@
##             master      #40      +/-   ##
============================================
- Coverage     66.90%   66.26%   -0.65%     
  Complexity      199      199              
============================================
  Files            17       17              
  Lines          1538     1571      +33     
  Branches        122      122              
============================================
+ Hits           1029     1041      +12     
- Misses          427      448      +21     
  Partials         82       82              
Impacted Files Coverage Δ Complexity Δ
...abric/tna/behaviour/pipeliner/FabricPipeliner.java 0.00% <0.00%> (ø) 0.00 <0.00> (ø)
...roject/fabric/tna/behaviour/FabricInterpreter.java 75.78% <100.00%> (+0.78%) 16.00 <0.00> (ø)
...mproject/fabric/tna/behaviour/P4InfoConstants.java 100.00% <100.00%> (ø) 1.00 <0.00> (ø)

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@@ -44,6 +44,7 @@
ETH_TYPE_PPPOE = 0x8864
ETH_TYPE_MPLS_UNICAST = 0x8847

ETH_TYPE_PACKET_IO = 0xBF01
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Suggested change
ETH_TYPE_PACKET_IO = 0xBF01
ETHERTYPE_PACKET_OUT = 0xBF01

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What's the reason to go against all other instances that use the ETH_TYPE_* naming scheme?

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Ah, this about IO vs OUT

@@ -53,6 +53,7 @@
private static final int CPU_LOOPBACK_MODE_DISABLED = 0;
private static final int CPU_LOOPBACK_MODE_DIRECT = 1;
private static final int CPU_LOOPBACK_MODE_INGRESS = 2;
private static final int ETHER_TYPE_PACKET_IO = 0xBF01;
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Suggested change
private static final int ETHER_TYPE_PACKET_IO = 0xBF01;
private static final int ETHERTYPE_PACKET_OUT = 0xBF01;

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@pudelkoM while we wait for Jenkins to approve, and before we can merge, it would be nice if you could update the PR description with a more meaningful description of the change. Thanks!

@ccascone ccascone removed the WIP Do not merge! label Sep 18, 2020
@ccascone ccascone merged commit 02f21ec into master Sep 21, 2020
@ccascone ccascone deleted the packet-out-l2-header branch September 21, 2020 23:49
bocon13 pushed a commit that referenced this pull request Dec 7, 2020
Makes the P4 program Tofino chip model independent by removing the dependency on the cpu port at compile time.
Instead this information is inserted at runtime by the controller into the switch_info table, and stored in the metadata for usage in the egress stages. To remove the dependency in the ingress parser (to detect PacketOuts from dataplane packets), we now use a special Ethertype in the serialized metadata header of PacketOuts.
bocon13 pushed a commit that referenced this pull request Dec 7, 2020
Makes the P4 program Tofino chip model independent by removing the dependency on the cpu port at compile time.
Instead this information is inserted at runtime by the controller into the switch_info table, and stored in the metadata for usage in the egress stages. To remove the dependency in the ingress parser (to detect PacketOuts from dataplane packets), we now use a special Ethertype in the serialized metadata header of PacketOuts.
bocon13 pushed a commit that referenced this pull request Dec 8, 2020
Makes the P4 program Tofino chip model independent by removing the dependency on the cpu port at compile time.
Instead this information is inserted at runtime by the controller into the switch_info table, and stored in the metadata for usage in the egress stages. To remove the dependency in the ingress parser (to detect PacketOuts from dataplane packets), we now use a special Ethertype in the serialized metadata header of PacketOuts.
bocon13 pushed a commit that referenced this pull request Dec 8, 2020
Makes the P4 program Tofino chip model independent by removing the dependency on the cpu port at compile time.
Instead this information is inserted at runtime by the controller into the switch_info table, and stored in the metadata for usage in the egress stages. To remove the dependency in the ingress parser (to detect PacketOuts from dataplane packets), we now use a special Ethertype in the serialized metadata header of PacketOuts.
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5 participants