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Incorrect performance counter #139

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jserv opened this issue Jun 2, 2023 · 0 comments
Closed

Incorrect performance counter #139

jserv opened this issue Jun 2, 2023 · 0 comments
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jserv commented Jun 2, 2023

@ypaskell implemented a number of 64-bit read-only user-level counters, including CSR_CYCLE and CSR_CYCLEH (#33).

The procedure to validate:

make clean
rm -rf src/mini-gdbstub
git reset --hard 53a6f9463c4b344746cb1154cbfb995e44f30300
make
build/rv32emu build/perfcount.elf

Output:

cycle count: 1728
instret: 174
Sparkle state:
4DF96879 8C7C2C33
82236B4A 904F4DD7
D6A030E8 F03B09AA
C4C3BB34 F063DFF9
61F9CEFF 8EC21FFA
93DF370F 83ACF1E2

However, in recent commits, both CSR_CYCLE and CSR_CYCLEH fail to deliver the expected values.

$ build/rv32emu build/perfcount.elf 
cycle count: 0
instret: 0
Sparkle state:
4DF96879 8C7C2C33
82236B4A 904F4DD7
D6A030E8 F03B09AA
C4C3BB34 F063DFF9
61F9CEFF 8EC21FFA
93DF370F 83ACF1E2

There is no increment for both cycle count and instret.
qwe661234 added a commit to qwe661234/rv32emu that referenced this issue Jun 2, 2023
@qwe661234
Fix incorrect performance counter
da06cf8 
The issue occurs when the variable csr undergoes sign-extension. Specifically,
the values of CSR_CYCLE and CSR_CYCLEH are assigned as 0xC00 and 0xC80 respectively.
During the decoding immediate stage, these values are unintentionally sign-extended
to 0xFFFFFX00 and 0xFFFFFC80. To mitigate this problem, a solution is only
the last 12 bits of csr are considered, disregarding the sign extension.

Solve: sysprog21#139
qwe661234 added a commit to qwe661234/rv32emu that referenced this issue Jun 2, 2023
@qwe661234
Fix incorrect performance counter
c3c6a3b 
The issue occurs when the variable csr undergoes sign-extension. Specifically,
the values of CSR_CYCLE and CSR_CYCLEH are assigned as 0xC00 and 0xC80 respectively.
During the decoding immediate stage, these values are unintentionally sign-extended
to 0xFFFFFC00 and 0xFFFFFC80. To mitigate this problem, a solution is only
the last 12 bits of csr are considered, disregarding the sign extension.

Solve: sysprog21#139
@qwe661234 qwe661234 mentioned this issue Jun 2, 2023
Merged
@jserv jserv closed this as completed in 206094b Jun 2, 2023
2011eric pushed a commit to 2011eric/rv32emu that referenced this issue Jul 22, 2023
@qwe661234 @2011eric
Fix incorrect performance counter (sysprog21#140)
3d21b13 
The issue occurs when the CSR undergoes sign-extension. Specifically, the values
of CSR_CYCLE and CSR_CYCLEH are assigned as 0xC00 and 0xC80 respectively.
During the decoding immediate stage, these values are unintentionally sign-extended
to 0xFFFFFC00 and 0xFFFFFC80. To mitigate this problem, a solution is only
the last 12 bits of CSR are considered, disregarding the sign extension.

Close sysprog21#139
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