Allow riscv-codegen to generate executable mul instruction without RV32M #56
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Add new compiler option +m/-m as the switch to take whether m extension or not. Check the global variable "riscv_m_extension" before riscv-codegen going to call __mul()/__div()/__mod(). If there is no m extension, replace __mul()/__div()/__mod() with __addi(zero, zero, 0) as the no operation in riscv.
Replace riscv_m_extension with use_m_ext. Update tests/driver.sh.
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Please remove generated file |
eecheng87
reviewed
Aug 1, 2022
| @@ -0,0 +1,9 @@ | |||
| #include <stdio.h> | |||
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What is the difference between this file and driver.sh:L324-331? Can we merge this test suite into driver.sh? I suppose there is something duplicate.
eecheng87
reviewed
Aug 1, 2022
| else { | ||
| emit(__addi(__zero, __zero, 0)); | ||
| /* implement multiplication with shift */ | ||
| /* emit(__addi(__t1, __zero, 1)); |
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Is this dead code? If so, please remove it.
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The proposed change was far away from the mainline. Drop it. |
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Add new compiler option +m/-m as the switch to take whether m extension or not.
Check the global variable "use_m_ext" before riscv-codegen going to call
__mul()/__div()/__mod().If there is no m extension, replace
__mul()/__div()/__mod()with__addi(zero, zero, 0)as the no operation in riscv.