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Change-Id: I805cf4929bc69d50237603d40bab6adb6fbdc862 Signed-off-by: Jeremy Soller <jeremy@system76.com>
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## SPDX-License-Identifier: GPL-2.0-only | ||
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config BOARD_SYSTEM76_MTL_COMMON | ||
def_bool n | ||
select BOARD_ROMSIZE_KB_32768 | ||
select DRIVERS_GENERIC_BAYHUB_LV2 | ||
select DRIVERS_GENERIC_CBFS_SERIAL | ||
select DRIVERS_GENERIC_CBFS_UUID | ||
select DRIVERS_I2C_HID | ||
select EC_SYSTEM76_EC | ||
select EC_SYSTEM76_EC_LOCKDOWN | ||
select HAVE_ACPI_RESUME | ||
select HAVE_ACPI_TABLES | ||
select HAVE_CMOS_DEFAULT | ||
select HAVE_OPTION_TABLE | ||
select INTEL_GMA_HAVE_VBT | ||
select INTEL_LPSS_UART_FOR_CONSOLE | ||
select MAINBOARD_HAS_TPM2 | ||
select MEMORY_MAPPED_TPM | ||
select NO_UART_ON_SUPERIO | ||
select PCIEXP_SUPPORT_RESIZABLE_BARS | ||
select SOC_INTEL_COMMON_BLOCK_HDA_VERB | ||
select SOC_INTEL_CRASHLOG | ||
select SOC_INTEL_METEORLAKE | ||
select SPD_READ_BY_WORD | ||
select SYSTEM_TYPE_LAPTOP | ||
select TPM_RDRESP_NEED_DELAY | ||
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config BOARD_SYSTEM76_LEMP13 | ||
select BOARD_SYSTEM76_MTL_COMMON | ||
select DRIVERS_I2C_TAS5825M | ||
select HAVE_SPD_IN_CBFS | ||
select SOC_INTEL_METEORLAKE_U_H | ||
select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES | ||
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if BOARD_SYSTEM76_MTL_COMMON | ||
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config MAINBOARD_DIR | ||
default "system76/mtl" | ||
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config VARIANT_DIR | ||
default "lemp13" if BOARD_SYSTEM76_LEMP13 | ||
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config OVERRIDE_DEVICETREE | ||
default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb" | ||
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config MAINBOARD_PART_NUMBER | ||
default "lemp13" if BOARD_SYSTEM76_LEMP13 | ||
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config MAINBOARD_SMBIOS_PRODUCT_NAME | ||
default "Lemur Pro" if BOARD_SYSTEM76_LEMP13 | ||
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config MAINBOARD_VERSION | ||
default "lemp13" if BOARD_SYSTEM76_LEMP13 | ||
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config CMOS_DEFAULT_FILE | ||
default "src/mainboard/\$(MAINBOARDDIR)/cmos.default" | ||
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config CONSOLE_POST | ||
default y | ||
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config D3COLD_SUPPORT | ||
default n | ||
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config DIMM_SPD_SIZE | ||
default 512 | ||
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config FMDFILE | ||
default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/variants/\$(CONFIG_VARIANT_DIR)/board.fmd" | ||
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config ONBOARD_VGA_IS_PRIMARY | ||
default y | ||
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config PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS | ||
default 36 | ||
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config POST_DEVICE | ||
default n | ||
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config TPM_MEASURED_BOOT | ||
default y | ||
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config UART_FOR_CONSOLE | ||
default 0 | ||
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# PM Timer Disabled, saves power | ||
config USE_PM_ACPI_TIMER | ||
default n | ||
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endif |
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## SPDX-License-Identifier: GPL-2.0-only | ||
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config BOARD_SYSTEM76_LEMP13 | ||
bool "lemp13" |
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## SPDX-License-Identifier: GPL-2.0-only | ||
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CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/include | ||
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ifeq ($(CONFIG_DRIVERS_GFX_NVIDIA),y) | ||
CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include | ||
endif | ||
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bootblock-y += bootblock.c | ||
bootblock-y += variants/$(VARIANT_DIR)/gpio_early.c | ||
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romstage-y += variants/$(VARIANT_DIR)/romstage.c | ||
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ramstage-y += ramstage.c | ||
ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c | ||
ramstage-y += variants/$(VARIANT_DIR)/gpio.c | ||
ramstage-y += variants/$(VARIANT_DIR)/ramstage.c | ||
ramstage-$(CONFIG_DRIVERS_I2C_TAS5825M) += variants/$(VARIANT_DIR)/tas5825m.c | ||
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SPD_SOURCES = samsung-M425R1GB4BB0-CQKOD |
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/* SPDX-License-Identifier: GPL-2.0-only */ | ||
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#include <drivers/intel/gma/acpi/gma.asl> | ||
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Scope (GFX0) | ||
{ | ||
Name (BRIG, Package (22) { | ||
100, /* default AC */ | ||
100, /* default Battery */ | ||
5, | ||
10, | ||
15, | ||
20, | ||
25, | ||
30, | ||
35, | ||
40, | ||
45, | ||
50, | ||
55, | ||
60, | ||
65, | ||
70, | ||
75, | ||
80, | ||
85, | ||
90, | ||
95, | ||
100 | ||
}) | ||
} |
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/* SPDX-License-Identifier: GPL-2.0-only */ | ||
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#define EC_GPE_SCI 0x6E | ||
#define EC_GPE_SWI 0x6B | ||
#include <ec/system76/ec/acpi/ec.asl> | ||
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Scope (\_SB) { | ||
#include "sleep.asl" | ||
Scope (PCI0) { | ||
#include "backlight.asl" | ||
} | ||
} |
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/* SPDX-License-Identifier: GPL-2.0-only */ | ||
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External(\TBTS, MethodObj) | ||
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Method(MPTS, 1, Serialized) { | ||
If (CondRefOf(\TBTS)) { | ||
\TBTS() | ||
} | ||
} |
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Vendor name: System76 | ||
Category: laptop | ||
ROM package: WSON-8 | ||
ROM protocol: SPI | ||
ROM socketed: n | ||
Flashrom support: y |
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/* SPDX-License-Identifier: GPL-2.0-only */ | ||
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#include <bootblock_common.h> | ||
#include <mainboard/gpio.h> | ||
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void bootblock_mainboard_early_init(void) | ||
{ | ||
mainboard_configure_early_gpios(); | ||
} |
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## SPDX-License-Identifier: GPL-2.0-only | ||
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boot_option=Fallback | ||
debug_level=Debug | ||
me_state=Disable |
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# SPDX-License-Identifier: GPL-2.0-only | ||
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entries | ||
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0 384 r 0 reserved_memory | ||
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# RTC_BOOT_BYTE (coreboot hardcoded) | ||
384 1 e 4 boot_option | ||
388 4 h 0 reboot_counter | ||
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# RTC_CLK_ALTCENTURY | ||
400 8 r 0 century | ||
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412 4 e 6 debug_level | ||
416 1 e 2 me_state | ||
417 3 h 0 me_state_counter | ||
904 80 h 0 ramtop | ||
984 16 h 0 check_sum | ||
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enumerations | ||
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2 0 Enable | ||
2 1 Disable | ||
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4 0 Fallback | ||
4 1 Normal | ||
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6 0 Emergency | ||
6 1 Alert | ||
6 2 Critical | ||
6 3 Error | ||
6 4 Warning | ||
6 5 Notice | ||
6 6 Info | ||
6 7 Debug | ||
6 8 Spew | ||
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checksums | ||
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checksum 408 983 984 |
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chip soc/intel/meteorlake | ||
register "common_soc_config" = "{ | ||
// Touchpad I2C bus | ||
.i2c[0] = { | ||
.speed = I2C_SPEED_FAST, | ||
.rise_time_ns = 80, | ||
.fall_time_ns = 110, | ||
}, | ||
}" | ||
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# Enable Enhanced Intel SpeedStep | ||
register "eist_enable" = "1" | ||
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# Thermal | ||
register "tcc_offset" = "8" | ||
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device cpu_cluster 0 on end | ||
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device domain 0 on | ||
device ref system_agent on end | ||
device ref igpu on | ||
# DDIA is eDP, TCP2 is HDMI | ||
register "ddi_port_A_config" = "1" | ||
register "ddi_ports_config" = "{ | ||
[DDI_PORT_A] = DDI_ENABLE_HPD, | ||
[DDI_PORT_2] = DDI_ENABLE_HPD | DDI_ENABLE_DDC, | ||
}" | ||
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register "gfx" = "GMA_DEFAULT_PANEL(0)" | ||
end | ||
device ref pmc_shared_sram on end | ||
device ref cnvi_wifi on | ||
register "cnvi_bt_core" = "true" | ||
register "cnvi_bt_audio_offload" = "true" | ||
chip drivers/wifi/generic | ||
register "wake" = "GPE0_PME_B0" | ||
device generic 0 on end | ||
end | ||
end | ||
device ref i2c1 on | ||
register "serial_io_i2c_mode[PchSerialIoIndexI2C1]" = "PchSerialIoPci" | ||
end | ||
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device ref heci1 on end | ||
device ref soc_espi on | ||
register "gen1_dec" = "0x00040069" # EC PM channel | ||
register "gen2_dec" = "0x00fc0e01" # AP/EC command | ||
register "gen3_dec" = "0x00fc0f01" # AP/EC debug | ||
chip drivers/pc80/tpm | ||
device pnp 0c31.0 on end | ||
end | ||
end | ||
device ref p2sb on end | ||
device ref hda on | ||
register "pch_hda_sdi_enable[0]" = "1" | ||
register "pch_hda_audio_link_hda_enable" = "1" | ||
register "pch_hda_idisp_codec_enable" = "1" | ||
register "pch_hda_idisp_link_frequency" = "HDA_LINKFREQ_96MHZ" | ||
register "pch_hda_idisp_link_tmode" = "HDA_TMODE_8T" | ||
end | ||
device ref smbus on end | ||
device ref fast_spi on end | ||
end | ||
end |
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/* SPDX-License-Identifier: GPL-2.0-only */ | ||
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//TODO: HACK FOR MISSING MISCCFG_GPIO_PM_CONFIG_BITS | ||
#include <soc/gpio.h> | ||
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#include <acpi/acpi.h> | ||
DefinitionBlock( | ||
"dsdt.aml", | ||
"DSDT", | ||
ACPI_DSDT_REV_2, | ||
OEM_ID, | ||
ACPI_TABLE_CREATOR, | ||
0x20110725 | ||
) | ||
{ | ||
#include <acpi/dsdt_top.asl> | ||
#include <soc/intel/common/block/acpi/acpi/platform.asl> | ||
#include <soc/intel/common/block/acpi/acpi/globalnvs.asl> | ||
#include <cpu/intel/common/acpi/cpu.asl> | ||
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Device (\_SB.PCI0) | ||
{ | ||
#include <soc/intel/common/block/acpi/acpi/northbridge.asl> | ||
#include <soc/intel/meteorlake/acpi/southbridge.asl> | ||
#include <soc/intel/meteorlake/acpi/tcss.asl> | ||
} | ||
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#include <southbridge/intel/common/acpi/sleepstates.asl> | ||
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Scope (\_SB.PCI0.LPCB) | ||
{ | ||
#include <drivers/pc80/pc/ps2_controller.asl> | ||
} | ||
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#include "acpi/mainboard.asl" | ||
} |
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/* SPDX-License-Identifier: GPL-2.0-only */ | ||
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#ifndef MAINBOARD_GPIO_H | ||
#define MAINBOARD_GPIO_H | ||
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void mainboard_configure_early_gpios(void); | ||
void mainboard_configure_gpios(void); | ||
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#endif |
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/* SPDX-License-Identifier: GPL-2.0-only */ | ||
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#include <mainboard/gpio.h> | ||
#include <soc/ramstage.h> | ||
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static void mainboard_init(void *chip_info) | ||
{ | ||
mainboard_configure_gpios(); | ||
} | ||
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struct chip_operations mainboard_ops = { | ||
.init = mainboard_init, | ||
}; |
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src/mainboard/system76/mtl/spd/samsung-M425R1GB4BB0-CQKOD.spd.hex
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# Samsung M425R1GB4BB0-CQKOD | ||
30 10 12 03 04 00 40 42 00 00 00 00 90 02 00 00 | ||
00 00 00 00 A0 01 F2 03 7A 0D 00 00 00 00 80 3E | ||
80 3E 80 3E 00 7D 80 BB 30 75 27 01 A0 00 82 00 | ||
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ||
00 00 00 00 00 00 88 13 08 88 13 08 20 4E 20 10 | ||
27 10 1A 41 28 10 27 10 C4 09 04 4C 1D 0C 00 00 | ||
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ||
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ||
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ||
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ||
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ||
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ||
10 00 80 B3 80 21 80 B3 82 20 00 00 00 00 00 00 | ||
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ||
00 00 00 00 00 00 0F 01 02 81 00 22 00 00 00 00 | ||
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ||
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ||
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ||
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ||
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ||
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ||
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ||
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ||
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ||
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ||
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ||
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ||
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ||
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ||
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ||
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ||
00 00 00 00 00 00 00 00 00 00 00 00 00 00 09 D1 |
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