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Default Register Map Format
By default, RgGen specifies the default register map format. Following is an example of register map.
A | B | C | D | E | F | G | H | I | J | |
---|---|---|---|---|---|---|---|---|---|---|
1 | Block Name | block_0 | ||||||||
2 | Byte Size | 256 | ||||||||
3 | ||||||||||
4 | Offset Address | Register Name | Array Dimension | Type | Bit Assignment | Field Name | Type | Iitial Value | Reference | |
5 | 0x00 | register_0 | [8] | field_0_0 | rw | 0 | ||||
6 | [0] | field_0_1 | rw | 0 | ||||||
7 | 0x04 | register_1 | [31:0] | field_1_0 | ro | |||||
8 | 0x08 | register_2 | [31:16] | field_2_0 | rw | 0 | ||||
9 | [15:0] | field_2_1 | rw | 0 | ||||||
10 | 0x0c | register_3 | [8] | field_3_0 | w0s | 0 | ||||
11 | [0] | field_3_1 | w1s | 0 | ||||||
12 | 0x10 | register_4 | [8] | field_4_0 | w0c | 0 | ||||
13 | [0] | field_4_1 | w1c | 0 | ||||||
14 | 0x14 | register_5 | [8] | field_5_0 | rwl | 0 | field_0_0 | |||
15 | [0] | field_6_1 | rwe | 0 | field_0_1 | |||||
16 | 0x20 - 0x2F | register_6 | [4] | [7:0] | field_6_0 | rw | 0 | |||
17 | 0x30 | register_7 | [2, 4] | indirect: field_0_0:1, field_2_0, field_2_1 | [7:0] | field_7_0 | rw | 0 | ||
18 | 0x40 - 0x5F | register_8 | external |
Specify name of a register block. You need to specify an unique name in the whole of your register map.
Specify how many bytes in a register block.
Specify offset address of a register. If a register contains a single word, you can specify its value like 0x00
. If a register contains multiple words, you can specify its value like 0x00 - 0x1F
.
Specify name of a register. You need to specify an unique name in a whole register block.
Specify array dimension of a register. If a register is not an array, you don't need to specify this value.
- Single Dimension Array
If a register is a single dimension array, you can specify its value like [2]
.
- Multiple Dimensions Array
If a register is a multiple dimensions array, you can specify its value like [2, 4]
. In addition, you can a multiple dimensions array only when a register is a shadow register.
Specify type of a register. By default, you can specify below register types:
- default
- indirect
- external
This is a normal register; located by an offset address and including bit field(s). If register type is not specified then this type is selected.
Some registers are not located only by an offset address but also by index bit field(s). The indirect register type is for this purpose. You need to specify index bit field(s) by using a combination of conditional index bit field(s) and array index bit field(s) like conditional_index_a:0, conditional_index_b:1, array_index_a, array_index_b
. A conditional index bit field is used as condition for selecting. An array index bit field is used as index of array. In case of above example, you can access the register_6[1][3]
register only when the field_0_0
is 1, the field_2_0
is 1 and the field_2_1
is 3.
The external register type is to assign an address range to an another external module, e.g. SRAM, FIFO, etc. If you select this type then the generated RTL will have an interface to connect an external module.
Specify bit assignment of a bit field in a register. You can specify its value like [0]
or [7:0]
.
Specify name of a bit field. You need to specify an unique name in a whole register block.
Specify type of a bit field. By default, you can specify below bit field types:
Type Name | Description | Note |
---|---|---|
rw | Read, Write | |
ro | Read Only | |
w0c/w1c | Write 0/1 to Clear | |
w0s/w1s | Write 0/1 to Set | |
rwl | Read, Write with Lock | Can be written only when its reference (lock) bit field is 0. |
rwe | Read, Write with Enable | Can be wretten only when its reference (eanble) bit field is 1. |
Specify the value after reset. You can specify an integral value.
Specify a bit field referred by this bit field. Currently, you can use this value only when type of bit field is rwl or rwe.