Problems with Vivado simulator

[Nick1296]

Hi Taichi,

Thanks for taking care of this project! I am trying to compile it with Vivado, but I have some problems with Xelab, so I need some help.

More specifically, I tried these versions and the following issues:

• Vivado 2023.2: I hit an infinite loop which causes Xelab to keep allocating memory until my device runs out of RAM.
• Vivado 2022.1: The simulation Xelab requires me to have only one signal in the sensitivity list per clocking block. Then I have a good amount of errors regarding unsupported logical comparisons and unsupported subprog types. The simulation in this case starts but randomization fails.
• Vivado 2019.2: Xelab has a segmentation fault with the following backtrace:

Completed static elaboration                                                                                                                                                                            
ERROR: [XSIM 43-3316] Signal SIGSEGV received.                                                                                                                                                          
Printing stacktrace...                                                                                                                                                                                  
                                                                                                                                                                                                        
[0] /tools/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab() [0x75de43]                                                                                                                                
[1] /tools/Xilinx/Vivado/2019.2/lib/lnx64.o/libxsimverific.so(Verific::VeriVisitor::Visit(Verific::VeriFunctionCall&)+0x188) [0x7f793ff9df58]                                                           
[2] /tools/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab() [0x7593a0]                                                                                                                                
[3] /tools/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab() [0x75aad6]                                                                                                                                
[4] /tools/Xilinx/Vivado/2019.2/lib/lnx64.o/libxsimverific.so(Verific::VeriVisitor::Visit(Verific::VeriUnaryOperator&)+0xa9) [0x7f793ff93c99]                                                           
[5] /tools/Xilinx/Vivado/2019.2/lib/lnx64.o/libxsimverific.so(Verific::VeriVisitor::Visit(Verific::VeriConditionalStatement&)+0x1a9) [0x7f793ff98a19]                                                   
[6] /tools/Xilinx/Vivado/2019.2/lib/lnx64.o/libxsimverific.so(Verific::VeriVisitor::TraverseArray(Verific::Array const*)+0x86) [0x7f793ff91d56]
[7] /tools/Xilinx/Vivado/2019.2/lib/lnx64.o/libxsimverific.so(Verific::VeriVisitor::Visit(Verific::VeriSeqBlock&)+0xc4) [0x7f793ff97d34]
[8] /tools/Xilinx/Vivado/2019.2/lib/lnx64.o/libxsimverific.so(Verific::VeriVisitor::Visit(Verific::VeriConditionalStatement&)+0x181) [0x7f793ff989f1]
[9] /tools/Xilinx/Vivado/2019.2/lib/lnx64.o/libxsimverific.so(Verific::VeriVisitor::TraverseArray(Verific::Array const*)+0x86) [0x7f793ff91d56]
[10] /tools/Xilinx/Vivado/2019.2/lib/lnx64.o/libxsimverific.so(Verific::VeriVisitor::Visit(Verific::VeriSeqBlock&)+0xc4) [0x7f793ff97d34]
[11] /tools/Xilinx/Vivado/2019.2/lib/lnx64.o/libxsimverific.so(Verific::VeriVisitor::TraverseArray(Verific::Array const*)+0x86) [0x7f793ff91d56]
[12] /tools/Xilinx/Vivado/2019.2/lib/lnx64.o/libxsimverific.so(Verific::VeriVisitor::Visit(Verific::VeriTaskDecl&)+0xb9) [0x7f793ff98e29]
[13] /tools/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab() [0x75a173]                           
[14] /tools/Xilinx/Vivado/2019.2/lib/lnx64.o/libxsimverific.so(Verific::VeriVisitor::TraverseArray(Verific::Array const*)+0x86) [0x7f793ff91d56]
[15] /tools/Xilinx/Vivado/2019.2/lib/lnx64.o/libxsimverific.so(Verific::VeriVisitor::Visit(Verific::VeriClass&)+0x11b) [0x7f793ff99d3b]
[16] /tools/Xilinx/Vivado/2019.2/lib/lnx64.o/libxsimverific.so(Verific::VeriVisitor::TraverseArray(Verific::Array const*)+0x86) [0x7f793ff91d56]
[17] /tools/Xilinx/Vivado/2019.2/lib/lnx64.o/libxsimverific.so(Verific::VeriVisitor::Visit(Verific::VeriModule&)+0x98) [0x7f793ff98698]
[18] /tools/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab() [0x76248b]                           
[19] /tools/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab() [0x75ae30]                           
[20] /tools/Xilinx/Vivado/2019.2/lib/lnx64.o/libxsimverific.so(Verific::VeriVisitor::TraverseArray(Verific::Array const*)+0x86) [0x7f793ff91d56]
[21] /tools/Xilinx/Vivado/2019.2/lib/lnx64.o/libxsimverific.so(Verific::VeriVisitor::Visit(Verific::VeriFunctionDecl&)+0xef) [0x7f793ff9998f]
[22] /tools/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab() [0x75a1e3]                           
[23] /tools/Xilinx/Vivado/2019.2/lib/lnx64.o/libxsimverific.so(Verific::VeriVisitor::TraverseArray(Verific::Array const*)+0x86) [0x7f793ff91d56]
[24] /tools/Xilinx/Vivado/2019.2/lib/lnx64.o/libxsimverific.so(Verific::VeriVisitor::Visit(Verific::VeriClass&)+0x11b) [0x7f793ff99d3b]
[25] /tools/Xilinx/Vivado/2019.2/lib/lnx64.o/libxsimverific.so(Verific::VeriVisitor::TraverseArray(Verific::Array const*)+0x86) [0x7f793ff91d56]
[26] /tools/Xilinx/Vivado/2019.2/lib/lnx64.o/libxsimverific.so(Verific::VeriVisitor::Visit(Verific::VeriModule&)+0x98) [0x7f793ff98698]
[27] /tools/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab() [0x76248b]                           
[28] /tools/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab() [0x75a69a]                           
[29] /tools/Xilinx/Vivado/2019.2/lib/lnx64.o/libxsimverific.so(Verific::VeriVisitor::Visit(Verific::VeriSelectedName&)+0xb9) [0x7f793ff93559]
[30] /tools/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab() [0x75d963]                           
[31] /tools/Xilinx/Vivado/2019.2/lib/lnx64.o/libxsimverific.so(Verific::VeriVisitor::Visit(Verific::VeriScopeName&)+0x10) [0x7f793ff97160]
[32] /tools/Xilinx/Vivado/2019.2/lib/lnx64.o/libxsimverific.so(Verific::VeriVisitor::TraverseArray(Verific::Array const*)+0x86) [0x7f793ff91d56]
[33] /tools/Xilinx/Vivado/2019.2/lib/lnx64.o/libxsimverific.so(Verific::VeriVisitor::Visit(Verific::VeriImportDecl&)+0x138) [0x7f793ff9bfd8]
[34] /tools/Xilinx/Vivado/2019.2/lib/lnx64.o/libxsimverific.so(Verific::VeriVisitor::TraverseArray(Verific::Array const*)+0x86) [0x7f793ff91d56]
[35] /tools/Xilinx/Vivado/2019.2/lib/lnx64.o/libxsimverific.so(Verific::VeriVisitor::Visit(Verific::VeriModule&)+0x98) [0x7f793ff98698]
[36] /tools/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab() [0x76248b]                           
[37] /tools/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab() [0x76129c]                           
[38] /tools/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab() [0x4800da]                           
[39] /tools/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab() [0x45241d]                           
[40] /lib/x86_64-linux-gnu/libc.so.6(+0x29d90) [0x7f793ec00d90]                                     
[41] /lib/x86_64-linux-gnu/libc.so.6(__libc_start_main+0x80) [0x7f793ec00e40]                       
[42] /tools/Xilinx/Vivado/2019.2/bin/unwrapped/lnx64.o/xelab() [0x46a3d0] 

Done

I would really appreciate it if you can provide me with some ideas how to have at least one of these versions run correctly.

Thanks again for your support!

[taichi-ishitani]

Vivado sim provides poor SystemVerilog support so it's very difficult to use tvip-axi on Vivado sim.

I also have tried to use tvip-axi on Vivado sim.
(See #32, rggen/rggen-sample-testbench#5)
For this trial, I used Vivado 2022.1 version but I got unexpected randomization errors.

[taichi-ishitani]

If you really want to use tvip-axi on Vivado sim, I think you need to do:

• Use Vivado 2022.1
• Check out the previous revision of tvip-axi (6a04a56)
  • This is to avoid the Multiple clocking events for clocking block is not supported yet. error
• Remove randomizations related to tvip-axi from your TB and testcases

[Nick1296]

Thank you! I will try that as soon as I can and report back!

[taichi-ishitani]

How about using the dsim simulator?
https://www.metrics.ca/product

I've confirmed that this simulator can compile and run the sample tests of tvip-axi.