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stm32f4 IRQ manager correct static members initialization #17
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,113 @@ | ||
| #include <platform/irq_manager.hpp> | ||
| #include <new> | ||
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| IRQ_manager::handler_storage IRQ_manager::m_storage[CONFIG_IRQ_COUNT]; | ||
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| void IRQ_manager::init() | ||
| { | ||
| // Initialize storage | ||
| for (auto &h : m_storage) { | ||
| new (&h) handler_type{default_handler}; | ||
| } | ||
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| __enable_irq(); | ||
| } | ||
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| int IRQ_manager::subscribe(IRQn_t irqn, const std::function< void() > &handler) | ||
| { | ||
| // TODO: Use platform assert when it will be ready | ||
| if (irqn < 0) { | ||
| return -1; | ||
| } | ||
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| auto handlers = extract_handlers(); | ||
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| __disable_irq(); | ||
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| // Magic here. | ||
| // Logical priority of *any* user interrupt that use | ||
| // FreeRTOS API must not be greather than | ||
| // configMAX_SYSCALL_INTERRUPT_PRIORITY | ||
| NVIC_SetPriority(irqn, CONFIG_MAX_ISR_PRIORITY); | ||
| handlers[irqn] = handler; | ||
| __enable_irq(); | ||
| return 0; | ||
| } | ||
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| int IRQ_manager::unsubscribe(IRQn_t irqn) | ||
| { | ||
| // TODO: Use platform assert when it will be ready | ||
| if (irqn < 0) { | ||
| return -1; | ||
| } | ||
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| auto handlers = extract_handlers(); | ||
| __disable_irq(); | ||
| handlers[irqn] = default_handler; | ||
| __enable_irq(); | ||
| return 0; | ||
| } | ||
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| int IRQ_manager::mask(IRQn_t irqn) | ||
| { | ||
| // TODO: Use platform assert when it will be ready | ||
| if (irqn < 0) { | ||
| return -1; | ||
| } | ||
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| NVIC_DisableIRQ(irqn); | ||
| return 0; | ||
| } | ||
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| int IRQ_manager::unmask(IRQn_t irqn) | ||
| { | ||
| // TODO: Use platform assert when it will be ready | ||
| if (irqn < 0) { | ||
| return -1; | ||
| } | ||
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| // TODO: error check | ||
| NVIC_EnableIRQ(irqn); | ||
| return 0; | ||
| } | ||
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| int IRQ_manager::clear(IRQn_t irqn) | ||
| { | ||
| // TODO: Use platform assert when it will be ready | ||
| if (irqn < 0) { | ||
| return -1; | ||
| } | ||
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| // TODO: error check | ||
| NVIC_ClearPendingIRQ(static_cast< IRQn_t > (irqn)); | ||
| return 0; | ||
| } | ||
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| //------------------------------------------------------------------------------ | ||
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| void IRQ_manager::isr() | ||
| { | ||
| volatile int irqn; | ||
| auto handlers = extract_handlers(); | ||
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| asm volatile ( | ||
| "mrs %0, ipsr" : "=r" (irqn) | ||
| ); | ||
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| // IPSR holds exception numbers starting from 0 | ||
| // Valid IRQ number starts from -15 | ||
| // See Cortex-M4 processors documentation | ||
| // http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0553a/CHDBIBGJ.html | ||
| irqn -= 16; | ||
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| // TODO: Is it needed? | ||
| mask(static_cast< IRQn_t >(irqn)); | ||
| handlers[irqn](); | ||
| } | ||
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| void IRQ_manager::default_handler() | ||
| { | ||
| __disable_irq(); | ||
| for(;;); | ||
| } | ||
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irqn can be negative (as IRQn_t defined in stm32f4xx.h). Would be nice to add a check at least.
Does this also mean that I can't set a custom handler for first 15 interrupts (say UsageFault_IRQn) ?
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IRQ manager in current implementation doesn't support handling of system exceptions. To subscribe for exception events one may override handlers at compile time via the weak symbol mechanism.