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[TEST] debug for clock stop prepare failed: -61 #2634

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shumingfan
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debug for clock stop prepare failed issue

@bardliao I can't reproduce the #2621 issue on Dell Andrews.
Would you please use this PR to trigger the CI test, then show me the log?

Signed-off-by: Shuming Fan <shumingf@realtek.com>
@bardliao
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@shumingfan I can reproduce it with ./check-suspend-resume-with-audio.sh -l 2000 on my Dell laptop.
Below is the log.

[60425.277919] intel-sdw intel-sdw.1: Msg ignored for Slave 1
[60425.277931] rt1308 sdw:1:25d:1308:0: Clock Stop prepare failed for slave: -61
[60425.278147] intel-sdw intel-sdw.1: Msg ignored for Slave 0
[60425.278156] rt1308 sdw:1:25d:1308:0: ID=0, sdw_transfer, ret = -61
[60425.278162] rt1308 sdw:1:25d:1308:0: ID=0, Slave Device Number = 255
[60425.278364] intel-sdw intel-sdw.1: Msg ignored for Slave 1
[60425.278373] rt1308 sdw:1:25d:1308:0: ID=1, sdw_transfer, ret = -61
[60425.278379] rt1308 sdw:1:25d:1308:0: ID=1, Slave Device Number = 255
[60425.278384] rt1308 sdw:1:25d:1308:0: pre-prepare failed:-61
[60425.278395] intel-sdw intel-sdw.1: prepare clock stop failed -61
[60425.278404] intel-sdw intel-sdw.1: cannot enable clock stop on suspend

dmesg.txt

@shumingfan
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@shumingfan I can reproduce it with ./check-suspend-resume-with-audio.sh -l 2000 on my Dell laptop.

@bardliao We could remove the suspect problem about the device number.
I checked this issue with the hardware engineer.
In typically, the command_ignored happened while reading from a write-only register and accessing a reserved address or an optional register that is not implemented.
This issue happened while writing SDW_SCP_SYSTEMCTRL register which belongs to the MIPI-defined register. Hence, it doesn't belong to the typical situation.
He said that there is something we could check that the bus clock exists or not and the status of power DVDD_33 when the issue happened.

@shumingfan
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There is a new test patch #2695 for this issue.
Close this PR now.

@shumingfan shumingfan closed this Jan 19, 2021
@shumingfan shumingfan deleted the clock-stop-prepare-failed-test branch August 31, 2021 08:05
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2 participants