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[FEATURE] Support for scheduling long period tasks #5966
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@lenghonglin fyi |
When PCH-attached DMICs are used on a SoundWire-based platform, all known devices pin-mux SoundWire link2 and link3 with DMIC, and only use link0 and link1 for SoundWire. The HP Omen16 is the first exception to the rule, with SoundWire using link0 and link3. Rather than using a fixed mask, let's count the number of SoundWire links used. BugLink: thesofproject/sof#5966 Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
At first, From a design perspective, i think the At Second, For my application scenario, I assumed audio formats of 16K,16bit,1ch, period_byte of 1KB, and almost 30ms. So this means I can execute pipe-task in less than 30ms. If long Period Tasks are not supported, this will slow down the CPU to do unnecessary work. In addition, I would like to be able to set period_bytes through the topology so that the sampling period can be configured more flexibly. At third, my xtensa core not only run sof framework , there are other task need to run , though it not important than sof , but if not support long period tasks, it mean the other task hardly to be schedue. |
So the Low Latency (LL) scheduler is designed for simple 1ms periodic synchronous work with tghe following rules
Providing 1 & 2 hold then we can execute less frequent tasks at any period. This does not scale when the workload takes > 1 ms to execute and hence means we need to use a different scheduler algorithm for longer and higher latency work (aka the "EDF" preemptive scheduler on SOF xtos). The xtos "EDF" preemptive on xtos could only support 1 priority and scheduling > 1 EDF task was non deterministic (i.e. we wold not guarantee execution order or scheduling start time). This all changes with Zephyr as all the old EDF preemptive tasks would be Zephyr preemptable threads (running with different priorities), there will also be more advanced scheduling available later too, but using the Zephyr thread preemption is the first step. |
The other things is that Can we consider config |
No. Period_bytes is related to the latency and expected buffering. It's not an indicator of the duration of the processing. |
@lgirdwood are you saying that the EDF tasks in xtos are not preemptible and thats the reason we cannot implement this feature with xtos? |
When PCH-attached DMICs are used on a SoundWire-based platform, all known devices pin-mux SoundWire link2 and link3 with DMIC, and only use link0 and link1 for SoundWire. The HP Omen16 is the first exception to the rule, with SoundWire using link0 and link3. Rather than using a fixed mask, let's count the number of SoundWire links used. BugLink: thesofproject/sof#5966 Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Sorry, I'm saying the EDF tasks in xtos are preemptable by LL tasks (as they are IRQ context) but not by other EDF tasks. i.e. all EDF tasks on xtos have the same priority. However on Zephyr we can have preemptable tasks with different priorities (where the scheduler will pick the highest priority task) |
When PCH-attached DMICs are used on a SoundWire-based platform, all known devices pin-mux SoundWire link2 and link3 with DMIC, and only use link0 and link1 for SoundWire. The HP Omen16 is the first exception to the rule, with SoundWire using link0 and link3. Rather than using a fixed mask, let's count the number of SoundWire links used. BugLink: thesofproject/sof#5966 Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
When PCH-attached DMICs are used on a SoundWire-based platform, all known devices pin-mux SoundWire link2 and link3 with DMIC, and only use link0 and link1 for SoundWire. The HP Omen16 is the first exception to the rule, with SoundWire using link0 and link3. Rather than using a fixed mask, let's count the number of SoundWire links used. BugLink: thesofproject/sof#5966 Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
When PCH-attached DMICs are used on a SoundWire-based platform, all known devices pin-mux SoundWire link2 and link3 with DMIC, and only use link0 and link1 for SoundWire. The HP Omen16 is the first exception to the rule, with SoundWire using link0 and link3. Rather than using a fixed mask, let's count the number of SoundWire links used. BugLink: thesofproject/sof#5966 Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
When PCH-attached DMICs are used on a SoundWire-based platform, all known devices pin-mux SoundWire link2 and link3 with DMIC, and only use link0 and link1 for SoundWire. The HP Omen16 is the first exception to the rule, with SoundWire using link0 and link3. Rather than using a fixed mask, let's count the number of SoundWire links used. BugLink: thesofproject/sof#5966 Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com>
When PCH-attached DMICs are used on a SoundWire-based platform, all known devices pin-mux SoundWire link2 and link3 with DMIC, and only use link0 and link1 for SoundWire. The HP Omen16 is the first exception to the rule, with SoundWire using link0 and link3. Rather than using a fixed mask, let's count the number of SoundWire links used. BugLink: thesofproject/sof#5966 Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com> Link: https://lore.kernel.org/r/20220715144144.274770-5-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
One PR addressing this was just submitted #7089 |
V2.5 branching this week and feature not ready, moving to v2.6. |
Moved to v2.7 as DP multicore wont be upstream in time for v2.6 |
Is your feature request related to a problem? Please describe.
How do we support a pipeline with deep-buffering requirement connected to the mixer-dai pipeline that runs every 1ms.
This is required to support the multi-stream feature that needs pipeline with variable period sizes connected via mixer to the DAI.
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