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No way to use FPGA as SPI slave without hacking the board or removing the EEPROM #13

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jmlzone opened this issue May 2, 2021 · 2 comments

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@jmlzone
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jmlzone commented May 2, 2021

I was trying an to use the FPGA as a spi slave for booting from an external processor to load a configuration directly into the FPGA. I realized then when I go through the boot sequence and pull SS low for the FPGA, it also pulls SS low on the SPI EEPROM. I was hoping I could use the R11/12/13/27 jumpers, but that won't help because the flash pins are on the 3 & 4 of the board connector. If the FPGA pins were on the board connectors ie FPGA_SI (needed) and FPGA_SO (not realy needed) instead of FLASH_MOSI and FLASH_MSIO, that would solve my issue or other jumpers to assign the board connectors 3&4 between FLASH and FPGA.

Thanks for considering this for 3.x or 4.0.
James

@vr2045
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vr2045 commented May 2, 2021 via email

@jmlzone
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jmlzone commented May 3, 2021

After some thought, I came with a short term solution (for me) I Removed the R12/R13 and installed a '2x2 header' This allowed me to use 2 jumpers to select FLASH or SRAM or unplug and connect jumpers to the header for my use. Unfortunately the spacing of the resistors is just under 2.5mm so its tricky to bend and surface solder the header. Although I dislike movable jumpers as much as the next guy, this may be a good solution with minimal impact to the board layout.
Potentially to maximize flexibility and minimize build/test cost, layout with top traces shorting where r12/r13 are located but with the 4 through holes. Send the board with the 4 through holes and the user can cut the 'flash shorts' and install a 2x2 header and the jumpers.

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