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Merge pull request #1058 from tock/optional-cell-sam4l
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Optional cell sam4l
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@phil-levis
phil-levis committed Jul 3, 2018
2 parents 8b2fdf5 + 9ec9de5 commit 185e71f
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Showing 12 changed files with 129 additions and 112 deletions.
26 changes: 13 additions & 13 deletions chips/sam4l/src/adc.rs
View file
Expand Up @@ -18,7 +18,7 @@
use core::cell::Cell;
use core::{cmp, mem, slice};
use dma;
use kernel::common::cells::TakeCell;
use kernel::common::cells::{OptionalCell, TakeCell};
use kernel::common::math;
use kernel::common::regs::{ReadOnly, ReadWrite, WriteOnly};
use kernel::common::StaticRef;
Expand Down Expand Up @@ -118,15 +118,15 @@ pub struct Adc {
timer_counts: Cell<u8>,

// DMA peripheral, buffers, and length
rx_dma: Cell<Option<&'static dma::DMAChannel>>,
rx_dma: OptionalCell<&'static dma::DMAChannel>,
rx_dma_peripheral: dma::DMAPeripheral,
rx_length: Cell<usize>,
next_dma_buffer: TakeCell<'static, [u16]>,
next_dma_length: Cell<usize>,
stopped_buffer: TakeCell<'static, [u16]>,

// ADC client to send sample complete notifications to
client: Cell<Option<&'static EverythingClient>>,
client: OptionalCell<&'static EverythingClient>,
}

/// Memory mapped registers for the ADC.
Expand Down Expand Up @@ -371,30 +371,30 @@ impl Adc {
timer_counts: Cell::new(0),

// DMA status and stuff
rx_dma: Cell::new(None),
rx_dma: OptionalCell::empty(),
rx_dma_peripheral: rx_dma_peripheral,
rx_length: Cell::new(0),
next_dma_buffer: TakeCell::empty(),
next_dma_length: Cell::new(0),
stopped_buffer: TakeCell::empty(),

// higher layer to send responses to
client: Cell::new(None),
client: OptionalCell::empty(),
}
}

/// Sets the client for this driver.
///
/// - `client`: reference to capsule which handles responses
pub fn set_client<C: EverythingClient>(&self, client: &'static C) {
self.client.set(Some(client));
self.client.set(client);
}

/// Sets the DMA channel for this driver.
///
/// - `rx_dma`: reference to the DMA channel the ADC should use
pub fn set_dma(&self, rx_dma: &'static dma::DMAChannel) {
self.rx_dma.set(Some(rx_dma));
self.rx_dma.set(rx_dma);
}

/// Interrupt handler for the ADC.
Expand All @@ -413,7 +413,7 @@ impl Adc {

// single sample complete. Send value to client
let val = regs.lcv.read(SequencerLastConvertedValue::LCV) as u16;
self.client.get().map(|client| {
self.client.map(|client| {
client.sample_ready(val);
});

Expand Down Expand Up @@ -777,7 +777,7 @@ impl hil::adc::Adc for Adc {

// stop DMA transfer if going. This should safely return a None if
// the DMA was not being used
let dma_buffer = self.rx_dma.get().map_or(None, |rx_dma| {
let dma_buffer = self.rx_dma.map_or(None, |rx_dma| {
let dma_buf = rx_dma.abort_transfer();
rx_dma.disable();
dma_buf
Expand Down Expand Up @@ -902,7 +902,7 @@ impl hil::adc::AdcHighSpeed for Adc {
let dma_buf = unsafe { slice::from_raw_parts_mut(dma_buf_ptr, buffer1.len() * 2) };

// set up the DMA
self.rx_dma.get().map(move |dma| {
self.rx_dma.map(move |dma| {
self.dma_running.set(true);
dma.enable();
self.rx_length.set(dma_len);
Expand Down Expand Up @@ -980,7 +980,7 @@ impl dma::DMAClient for Adc {
// RX transfer was completed

// get buffer filled with samples from DMA
let dma_buffer = self.rx_dma.get().map_or(None, |rx_dma| {
let dma_buffer = self.rx_dma.map_or(None, |rx_dma| {
self.dma_running.set(false);
let dma_buf = rx_dma.abort_transfer();
rx_dma.disable();
Expand Down Expand Up @@ -1015,7 +1015,7 @@ impl dma::DMAClient for Adc {
let dma_buf = unsafe { slice::from_raw_parts_mut(dma_buf_ptr, buf.len() * 2) };

// set up the DMA
self.rx_dma.get().map(move |dma| {
self.rx_dma.map(move |dma| {
self.dma_running.set(true);
dma.enable();
self.rx_length.set(dma_len);
Expand All @@ -1029,7 +1029,7 @@ impl dma::DMAClient for Adc {
});

// alert client
self.client.get().map(|client| {
self.client.map(|client| {
dma_buffer.map(|dma_buf| {
// change buffer back into a [u16]
// the buffer was originally a [u16] so this should be okay
Expand Down
12 changes: 6 additions & 6 deletions chips/sam4l/src/aes.rs
View file
Expand Up @@ -9,7 +9,7 @@
//! Converted to new register abstraction by Philip Levis <pal@cs.stanford.edu>

use core::cell::Cell;
use kernel::common::cells::TakeCell;
use kernel::common::cells::{OptionalCell, TakeCell};
use kernel::common::regs::{ReadOnly, ReadWrite, WriteOnly};
use kernel::common::StaticRef;
use kernel::hil;
Expand Down Expand Up @@ -144,7 +144,7 @@ const AES_BASE: StaticRef<AesRegisters> =
pub struct Aes<'a> {
registers: StaticRef<AesRegisters>,

client: Cell<Option<&'a hil::symmetric_encryption::Client<'a>>>,
client: OptionalCell<&'a hil::symmetric_encryption::Client<'a>>,
source: TakeCell<'a, [u8]>,
dest: TakeCell<'a, [u8]>,

Expand All @@ -163,7 +163,7 @@ impl Aes<'a> {
const fn new() -> Aes<'a> {
Aes {
registers: AES_BASE,
client: Cell::new(None),
client: OptionalCell::empty(),
source: TakeCell::empty(),
dest: TakeCell::empty(),
write_index: Cell::new(0),
Expand Down Expand Up @@ -394,9 +394,9 @@ impl Aes<'a> {
self.disable_interrupts();

// Alert the client of the completion
if let Some(client) = self.client.get() {
self.client.map(|client| {
client.crypt_done(self.source.take(), self.dest.take().unwrap());
}
});
}
}
}
Expand All @@ -416,7 +416,7 @@ impl hil::symmetric_encryption::AES128<'a> for Aes<'a> {
}

fn set_client(&'a self, client: &'a hil::symmetric_encryption::Client<'a>) {
self.client.set(Some(client));
self.client.set(client);
}

fn set_key(&self, key: &[u8]) -> ReturnCode {
Expand Down
12 changes: 6 additions & 6 deletions chips/sam4l/src/ast.rs
View file
Expand Up @@ -4,7 +4,7 @@
//! - Author: Philip Levis <pal@cs.stanford.edu>
//! - Date: July 16, 2015

use core::cell::Cell;
use kernel::common::cells::OptionalCell;
use kernel::common::regs::{ReadOnly, ReadWrite, WriteOnly};
use kernel::common::StaticRef;
use kernel::hil::time::{self, Alarm, Freq16KHz, Time};
Expand Down Expand Up @@ -166,19 +166,19 @@ const AST_ADDRESS: StaticRef<AstRegisters> =

pub struct Ast<'a> {
registers: StaticRef<AstRegisters>,
callback: Cell<Option<&'a time::Client>>,
callback: OptionalCell<&'a time::Client>,
}

pub static mut AST: Ast<'static> = Ast {
registers: AST_ADDRESS,
callback: Cell::new(None),
callback: OptionalCell::empty(),
};

impl Controller for Ast<'a> {
type Config = &'static time::Client;

fn configure(&self, client: &'a time::Client) {
self.callback.set(Some(client));
self.callback.set(client);

pm::enable_clock(pm::Clock::PBD(PBDClock::AST));
self.select_clock(Clock::ClockOsc32);
Expand Down Expand Up @@ -207,7 +207,7 @@ impl Ast<'a> {
}

pub fn set_client(&self, client: &'a time::Client) {
self.callback.set(Some(client));
self.callback.set(client);
}

fn busy(&self) -> bool {
Expand Down Expand Up @@ -296,7 +296,7 @@ impl Ast<'a> {

pub fn handle_interrupt(&mut self) {
self.clear_alarm();
self.callback.get().map(|cb| {
self.callback.map(|cb| {
cb.fired();
});
}
Expand Down
10 changes: 5 additions & 5 deletions chips/sam4l/src/dma.rs
View file
Expand Up @@ -2,8 +2,8 @@

use core::cell::Cell;
use core::{cmp, intrinsics};
use kernel::common::cells::TakeCell;
use kernel::common::cells::VolatileCell;
use kernel::common::cells::{OptionalCell, TakeCell};
use kernel::common::regs::{ReadOnly, ReadWrite, WriteOnly};
use kernel::common::StaticRef;
use pm;
Expand Down Expand Up @@ -194,7 +194,7 @@ pub static mut DMA_CHANNELS: [DMAChannel; 16] = [

pub struct DMAChannel {
registers: StaticRef<DMARegisters>,
client: Cell<Option<&'static DMAClient>>,
client: OptionalCell<&'static DMAClient>,
width: Cell<DMAWidth>,
enabled: Cell<bool>,
buffer: TakeCell<'static, [u8]>,
Expand All @@ -212,15 +212,15 @@ impl DMAChannel {
(DMA_BASE_ADDR + (channel as usize) * DMA_CHANNEL_SIZE) as *const DMARegisters,
)
},
client: Cell::new(None),
client: OptionalCell::empty(),
width: Cell::new(DMAWidth::Width8Bit),
enabled: Cell::new(false),
buffer: TakeCell::empty(),
}
}

pub fn initialize(&self, client: &'static mut DMAClient, width: DMAWidth) {
self.client.set(Some(client));
self.client.set(client);
self.width.set(width);
}

Expand Down Expand Up @@ -272,7 +272,7 @@ impl DMAChannel {
.write(Interrupt::TERR::SET + Interrupt::TRC::SET + Interrupt::RCZ::SET);
let channel = registers.psr.get();

self.client.get().as_mut().map(|client| {
self.client.map(|client| {
client.transfer_done(channel);
});
}
Expand Down
16 changes: 8 additions & 8 deletions chips/sam4l/src/flashcalw.rs
View file
Expand Up @@ -24,7 +24,7 @@
use core::cell::Cell;
use core::ops::{Index, IndexMut};
use deferred_call_tasks::Task;
use kernel::common::cells::TakeCell;
use kernel::common::cells::{OptionalCell, TakeCell};
use kernel::common::deferred_call::DeferredCall;
use kernel::common::regs::{ReadOnly, ReadWrite, WriteOnly};
use kernel::common::StaticRef;
Expand Down Expand Up @@ -406,7 +406,7 @@ pub struct FLASHCALW {
ahb_clock: pm::Clock,
hramc1_clock: pm::Clock,
pb_clock: pm::Clock,
client: Cell<Option<&'static hil::flash::Client<FLASHCALW>>>,
client: OptionalCell<&'static hil::flash::Client<FLASHCALW>>,
current_state: Cell<FlashState>,
buffer: TakeCell<'static, Sam4lPage>,
}
Expand Down Expand Up @@ -446,7 +446,7 @@ impl FLASHCALW {
ahb_clock: pm::Clock::HSB(ahb_clk),
hramc1_clock: pm::Clock::HSB(hramc1_clk),
pb_clock: pm::Clock::PBB(pb_clk),
client: Cell::new(None),
client: OptionalCell::empty(),
current_state: Cell::new(FlashState::Unconfigured),
buffer: TakeCell::empty(),
}
Expand Down Expand Up @@ -501,7 +501,7 @@ impl FLASHCALW {
// Reset state now that we are ready to do a new operation.
self.current_state.set(FlashState::Ready);

self.client.get().map(|client| match attempted_operation {
self.client.map(|client| match attempted_operation {
FlashState::Read => {
self.buffer.take().map(|buffer| {
client.read_complete(buffer, hil::flash::Error::FlashError);
Expand All @@ -526,7 +526,7 @@ impl FLASHCALW {
FlashState::Read => {
self.current_state.set(FlashState::Ready);

self.client.get().map(|client| {
self.client.map(|client| {
self.buffer.take().map(|buffer| {
client.read_complete(buffer, hil::flash::Error::CommandComplete);
});
Expand Down Expand Up @@ -554,7 +554,7 @@ impl FLASHCALW {

self.current_state.set(FlashState::Ready);

self.client.get().map(|client| {
self.client.map(|client| {
self.buffer.take().map(|buffer| {
client.write_complete(buffer, hil::flash::Error::CommandComplete);
});
Expand All @@ -567,7 +567,7 @@ impl FLASHCALW {
FlashState::EraseErasing => {
self.current_state.set(FlashState::Ready);

self.client.get().map(|client| {
self.client.map(|client| {
client.erase_complete(hil::flash::Error::CommandComplete);
});
}
Expand Down Expand Up @@ -908,7 +908,7 @@ impl FLASHCALW {

impl<C: hil::flash::Client<Self>> hil::flash::HasClient<'static, C> for FLASHCALW {
fn set_client(&self, client: &'static C) {
self.client.set(Some(client));
self.client.set(client);
}
}

Expand Down
9 changes: 5 additions & 4 deletions chips/sam4l/src/gpio.rs
View file
Expand Up @@ -4,6 +4,7 @@ use self::Pin::*;
use core::cell::Cell;
use core::ops::{Index, IndexMut};
use core::sync::atomic::{AtomicUsize, Ordering};
use kernel::common::cells::OptionalCell;
use kernel::common::regs::{ReadOnly, ReadWrite, WriteOnly};
use kernel::common::StaticRef;
use kernel::hil;
Expand Down Expand Up @@ -295,7 +296,7 @@ pub struct GPIOPin {
port: StaticRef<GpioRegisters>,
pin_mask: u32,
client_data: Cell<usize>,
client: Cell<Option<&'static hil::gpio::Client>>,
client: OptionalCell<&'static hil::gpio::Client>,
}

impl GPIOPin {
Expand All @@ -308,12 +309,12 @@ impl GPIOPin {
},
pin_mask: 1 << ((pin as u32) % 32),
client_data: Cell::new(0),
client: Cell::new(None),
client: OptionalCell::empty(),
}
}

pub fn set_client<C: hil::gpio::Client>(&self, client: &'static C) {
self.client.set(Some(client));
self.client.set(client);
}

pub fn select_peripheral(&self, function: PeripheralFunction) {
Expand Down Expand Up @@ -426,7 +427,7 @@ impl GPIOPin {
}

pub fn handle_interrupt(&self) {
self.client.get().map(|client| {
self.client.map(|client| {
client.fired(self.client_data.get());
});
}
Expand Down

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