Merge #1212

1212: Brings Cortex-M3 support in line with Cortex-M4.  r=alevy a=phil-levis

This mostly takes the M4code and just copies it over to M3. The one major change an M3 chip
will see is some slight changes to handlers (svc_handler instead of SVC_handler).

Fixes a minor bug in the Cortex-M4 hard fault handler output, so
it correctly prints the start of the stack even when it's not the
same as _ezero.

### Pull Request Overview

The cortex-m3 library code, adding MPU support. It also fixes a tiny bug in the M4 hard fault handler.


### Testing Strategy

This pull request was tested by compiling for M4 and running on hotel (m3).


### TODO or Help Wanted

This pull request still needs others who are using M3s to update their code with the new handler names.


### Documentation Updated

- [X] Updated the relevant files in `/docs`, or no updates are required.

### Formatting

- [X] Ran `make formatall`.


Co-authored-by: Philip Levis <pal@cs.stanford.edu>
Co-authored-by: Brad Campbell <bradjc5@gmail.com>

arch/cortex-m/src/lib.rs

@@ -8,6 +8,7 @@
 #[macro_use(register_bitfields, register_bitmasks)]
 extern crate kernel;
 
+pub mod mpu;
 pub mod nvic;
 pub mod scb;
 pub mod support;