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port opentitan to non-global peripheral design
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hudson-ayers committed Nov 5, 2020
1 parent 7afdbe8 commit 8605058
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Showing 15 changed files with 214 additions and 164 deletions.
14 changes: 7 additions & 7 deletions boards/opentitan/src/aes_test.rs
Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@
//!
//! To test ECB mode, add the following line to the opentitan boot sequence:
//! ```
//! aes_test::run_aes128_ecb();
//! aes_test::run_aes128_ecb(&peripherals.aes);
//! ```
//! You should see the following output:
//! ```
Expand All @@ -13,24 +13,24 @@
//! ```

use capsules::test::aes::TestAes128Ecb;
use earlgrey::aes::{Aes, AES};
use earlgrey::aes::Aes;
use kernel::hil::symmetric_encryption::{AES128, AES128_BLOCK_SIZE, AES128_KEY_SIZE};
use kernel::static_init;

pub unsafe fn run_aes128_ecb() {
let t = static_init_test_ecb();
AES.set_client(t);
pub unsafe fn run_aes128_ecb(aes: &'static Aes) {
let t = static_init_test_ecb(aes);
aes.set_client(t);

t.run();
}

unsafe fn static_init_test_ecb() -> &'static mut TestAes128Ecb<'static, Aes<'static>> {
unsafe fn static_init_test_ecb(aes: &'static Aes) -> &'static TestAes128Ecb<'static, Aes<'static>> {
let source = static_init!([u8; 4 * AES128_BLOCK_SIZE], [0; 4 * AES128_BLOCK_SIZE]);
let data = static_init!([u8; 6 * AES128_BLOCK_SIZE], [0; 6 * AES128_BLOCK_SIZE]);
let key = static_init!([u8; AES128_KEY_SIZE], [0; AES128_KEY_SIZE]);

static_init!(
TestAes128Ecb<'static, Aes>,
TestAes128Ecb::new(&AES, key, source, data)
TestAes128Ecb::new(aes, key, source, data)
)
}
20 changes: 14 additions & 6 deletions boards/opentitan/src/io.rs
Original file line number Diff line number Diff line change
Expand Up @@ -22,9 +22,13 @@ impl Write for Writer {

impl IoWrite for Writer {
fn write(&mut self, buf: &[u8]) {
unsafe {
earlgrey::uart::UART0.transmit_sync(buf);
}
// This creates a second instance of the UART peripheral, and should only be used
// during panic.
earlgrey::uart::Uart::new(
earlgrey::uart::UART0_BASE,
earlgrey::chip_config::CONFIG.peripheral_freq,
)
.transmit_sync(buf);
}
}

Expand All @@ -33,9 +37,13 @@ impl IoWrite for Writer {
#[no_mangle]
#[panic_handler]
pub unsafe extern "C" fn panic_fmt(pi: &PanicInfo) -> ! {
// turn off the non panic leds, just in case
let first_led = &mut led::LedLow::new(&mut earlgrey::gpio::PORT[7]);
gpio::Pin::make_output(&earlgrey::gpio::PORT[7]);
let first_led_pin = &mut earlgrey::gpio::GpioPin::new(
earlgrey::gpio::GPIO0_BASE,
earlgrey::gpio::PADCTRL_BASE,
earlgrey::gpio::pins::pin7,
);
gpio::Pin::make_output(first_led_pin);
let first_led = &mut led::LedLow::new(first_led_pin);

let writer = &mut WRITER;

Expand Down
70 changes: 41 additions & 29 deletions boards/opentitan/src/main.rs
Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,7 @@

use capsules::virtual_alarm::{MuxAlarm, VirtualMuxAlarm};
use capsules::virtual_hmac::VirtualMuxHmac;
use earlgrey::chip::EarlGreyDefaultPeripherals;
use kernel::capabilities;
use kernel::common::dynamic_deferred_call::{DynamicDeferredCall, DynamicDeferredCallClientState};
use kernel::component::Component;
Expand Down Expand Up @@ -37,7 +38,10 @@ static mut PROCESSES: [Option<&'static dyn kernel::procs::ProcessType>; 4] =
[None, None, None, None];

static mut CHIP: Option<
&'static earlgrey::chip::EarlGrey<VirtualMuxAlarm<'static, earlgrey::timer::RvTimer>>,
&'static earlgrey::chip::EarlGrey<
VirtualMuxAlarm<'static, earlgrey::timer::RvTimer>,
EarlGreyDefaultPeripherals,
>,
> = None;

// How should the kernel respond when a process faults.
Expand Down Expand Up @@ -102,6 +106,11 @@ pub unsafe fn reset_handler() {
// Ibex-specific handler
earlgrey::chip::configure_trap_handler();

let peripherals = static_init!(
EarlGreyDefaultPeripherals,
EarlGreyDefaultPeripherals::new()
);

// initialize capabilities
let process_mgmt_cap = create_capability!(capabilities::ProcessManagementCapability);
let memory_allocation_cap = create_capability!(capabilities::MemoryAllocationCapability);
Expand All @@ -120,14 +129,14 @@ pub unsafe fn reset_handler() {

// Configure kernel debug gpios as early as possible
kernel::debug::assign_gpios(
Some(&earlgrey::gpio::PORT[7]), // First LED
Some(&peripherals.gpio_port[7]), // First LED
None,
None,
);

// Create a shared UART channel for the console and for kernel debug.
let uart_mux = components::console::UartMuxComponent::new(
&earlgrey::uart::UART0,
&peripherals.uart0,
earlgrey::uart::UART0_BAUDRATE,
dynamic_deferred_caller,
)
Expand All @@ -138,35 +147,35 @@ pub unsafe fn reset_handler() {
let led = components::led::LedsComponent::new(components::led_component_helper!(
earlgrey::gpio::GpioPin,
(
&earlgrey::gpio::PORT[8],
&peripherals.gpio_port[8],
kernel::hil::gpio::ActivationMode::ActiveHigh
),
(
&earlgrey::gpio::PORT[9],
&peripherals.gpio_port[9],
kernel::hil::gpio::ActivationMode::ActiveHigh
),
(
&earlgrey::gpio::PORT[10],
&peripherals.gpio_port[10],
kernel::hil::gpio::ActivationMode::ActiveHigh
),
(
&earlgrey::gpio::PORT[11],
&peripherals.gpio_port[11],
kernel::hil::gpio::ActivationMode::ActiveHigh
),
(
&earlgrey::gpio::PORT[12],
&peripherals.gpio_port[12],
kernel::hil::gpio::ActivationMode::ActiveHigh
),
(
&earlgrey::gpio::PORT[13],
&peripherals.gpio_port[13],
kernel::hil::gpio::ActivationMode::ActiveHigh
),
(
&earlgrey::gpio::PORT[14],
&peripherals.gpio_port[14],
kernel::hil::gpio::ActivationMode::ActiveHigh
),
(
&earlgrey::gpio::PORT[15],
&peripherals.gpio_port[15],
kernel::hil::gpio::ActivationMode::ActiveHigh
)
))
Expand All @@ -176,28 +185,28 @@ pub unsafe fn reset_handler() {
board_kernel,
components::gpio_component_helper!(
earlgrey::gpio::GpioPin,
0 => &earlgrey::gpio::PORT[0],
1 => &earlgrey::gpio::PORT[1],
2 => &earlgrey::gpio::PORT[2],
3 => &earlgrey::gpio::PORT[3],
4 => &earlgrey::gpio::PORT[4],
5 => &earlgrey::gpio::PORT[5],
6 => &earlgrey::gpio::PORT[6],
7 => &earlgrey::gpio::PORT[15]
0 => &peripherals.gpio_port[0],
1 => &peripherals.gpio_port[1],
2 => &peripherals.gpio_port[2],
3 => &peripherals.gpio_port[3],
4 => &peripherals.gpio_port[4],
5 => &peripherals.gpio_port[5],
6 => &peripherals.gpio_port[6],
7 => &peripherals.gpio_port[15]
),
)
.finalize(components::gpio_component_buf!(earlgrey::gpio::GpioPin));

let alarm = &earlgrey::timer::TIMER;
alarm.setup();
let hardware_alarm = static_init!(earlgrey::timer::RvTimer, earlgrey::timer::RvTimer::new());
hardware_alarm.setup();

// Create a shared virtualization mux layer on top of a single hardware
// alarm.
let mux_alarm = static_init!(
MuxAlarm<'static, earlgrey::timer::RvTimer>,
MuxAlarm::new(alarm)
MuxAlarm::new(hardware_alarm)
);
hil::time::Alarm::set_alarm_client(&earlgrey::timer::TIMER, mux_alarm);
hil::time::Alarm::set_alarm_client(hardware_alarm, mux_alarm);

// Alarm
let virtual_alarm_user = static_init!(
Expand All @@ -218,8 +227,11 @@ pub unsafe fn reset_handler() {
hil::time::Alarm::set_alarm_client(virtual_alarm_user, alarm);

let chip = static_init!(
earlgrey::chip::EarlGrey<VirtualMuxAlarm<'static, earlgrey::timer::RvTimer>>,
earlgrey::chip::EarlGrey::new(scheduler_timer_virtual_alarm)
earlgrey::chip::EarlGrey<
VirtualMuxAlarm<'static, earlgrey::timer::RvTimer>,
EarlGreyDefaultPeripherals,
>,
earlgrey::chip::EarlGrey::new(scheduler_timer_virtual_alarm, peripherals, hardware_alarm)
);
scheduler_timer_virtual_alarm.set_alarm_client(chip.scheduler_timer());
CHIP = Some(chip);
Expand All @@ -242,7 +254,7 @@ pub unsafe fn reset_handler() {
let hmac_data_buffer = static_init!([u8; 64], [0; 64]);
let hmac_dest_buffer = static_init!([u8; 32], [0; 32]);

let mux_hmac = components::hmac::HmacMuxComponent::new(&earlgrey::hmac::HMAC).finalize(
let mux_hmac = components::hmac::HmacMuxComponent::new(&peripherals.hmac).finalize(
components::hmac_mux_component_helper!(lowrisc::hmac::Hmac, [u8; 32]),
);

Expand All @@ -260,13 +272,13 @@ pub unsafe fn reset_handler() {
let i2c_master = static_init!(
capsules::i2c_master::I2CMasterDriver<lowrisc::i2c::I2c<'static>>,
capsules::i2c_master::I2CMasterDriver::new(
&earlgrey::i2c::I2C,
&peripherals.i2c,
&mut capsules::i2c_master::BUF,
board_kernel.create_grant(&memory_allocation_cap)
)
);

earlgrey::i2c::I2C.set_master_client(i2c_master);
peripherals.i2c.set_master_client(i2c_master);

// USB support is currently broken in the OpenTitan hardware
// See https://github.com/lowRISC/opentitan/issues/2598 for more details
Expand All @@ -283,7 +295,7 @@ pub unsafe fn reset_handler() {
// Flash
let nonvolatile_storage = components::nonvolatile_storage::NonvolatileStorageComponent::new(
board_kernel,
&earlgrey::flash_ctrl::FLASH_CTRL,
&peripherals.flash_ctrl,
0x20000000, // Start address for userspace accessible region
0x8000, // Length of userspace accessible region
&_sstorage as *const u8 as usize, // Start address of kernel region
Expand Down
8 changes: 5 additions & 3 deletions boards/opentitan/src/usb.rs
Original file line number Diff line number Diff line change
Expand Up @@ -11,18 +11,20 @@

#![allow(dead_code)] // Components are intended to be conditionally included

use earlgrey::usbdev::Usb;
use kernel::capabilities;
use kernel::component::Component;
use kernel::create_capability;
use kernel::static_init;

pub struct UsbComponent {
board_kernel: &'static kernel::Kernel,
usb: &'static Usb<'static>,
}

impl UsbComponent {
pub fn new(board_kernel: &'static kernel::Kernel) -> UsbComponent {
UsbComponent { board_kernel }
pub fn new(usb: &'static Usb, board_kernel: &'static kernel::Kernel) -> Self {
Self { usb, board_kernel }
}
}

Expand All @@ -40,7 +42,7 @@ impl Component for UsbComponent {
let usb_client = static_init!(
capsules::usb::usbc_client::Client<'static, lowrisc::usbdev::Usb<'static>>,
capsules::usb::usbc_client::Client::new(
&earlgrey::usbdev::USB,
self.usb,
capsules::usb::usbc_client::MAX_CTRL_PACKET_SIZE_EARLGREY
)
);
Expand Down
4 changes: 1 addition & 3 deletions chips/earlgrey/src/aes.rs
Original file line number Diff line number Diff line change
Expand Up @@ -80,7 +80,7 @@ pub struct Aes<'a> {
}

impl<'a> Aes<'a> {
const fn new() -> Aes<'a> {
pub const fn new() -> Aes<'a> {
Aes {
registers: AES_BASE,
client: OptionalCell::empty(),
Expand Down Expand Up @@ -341,8 +341,6 @@ impl<'a> hil::symmetric_encryption::AES128<'a> for Aes<'a> {
}
}

pub static mut AES: Aes<'static> = Aes::new();

impl kernel::hil::symmetric_encryption::AES128ECB for Aes<'_> {
fn set_mode_aes128ecb(&self, encrypting: bool) {
self.configure(encrypting);
Expand Down

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