WIP: remove reborrow

tock · Jun 22, 2020 · 94c96ac · 94c96ac
1 parent 51fccf9
commit 94c96ac
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Showing 2 changed files with 15 additions and 22 deletions.
diff --git a/arch/cortex-m3/src/mpu.rs b/arch/cortex-m3/src/mpu.rs
@@ -364,22 +364,19 @@ impl kernel::mpu::MPU for MPU {
     type MpuConfig = CortexMConfig;
 
     fn enable_mpu(&self) {
-        let regs = &*self.registers;
-
         // Enable the MPU, disable it during HardFault/NMI handlers, and allow
         // privileged code access to all unprotected memory.
-        regs.ctrl
+        self.registers
+            .ctrl
             .write(Control::ENABLE::SET + Control::HFNMIENA::CLEAR + Control::PRIVDEFENA::SET);
     }
 
     fn disable_mpu(&self) {
-        let regs = &*self.registers;
-        regs.ctrl.write(Control::ENABLE::CLEAR);
+        self.registers.ctrl.write(Control::ENABLE::CLEAR);
     }
 
     fn number_total_regions(&self) -> usize {
-        let regs = &*self.registers;
-        regs.mpu_type.read(Type::DREGION) as usize
+        self.registers.mpu_type.read(Type::DREGION) as usize
     }
 
     fn allocate_region(
@@ -680,12 +677,10 @@ impl kernel::mpu::MPU for MPU {
         // If the hardware is already configured for this app and the app's MPU
         // configuration has not changed, then skip the hardware update.
         if !self.hardware_is_configured_for.contains(app_id) || config.is_dirty.get() {
-            let regs = &*self.registers;
-
             // Set MPU regions
             for region in config.regions.iter() {
-                regs.rbar.write(region.base_address());
-                regs.rasr.write(region.attributes());
+                self.registers.rbar.write(region.base_address());
+                self.registers.rasr.write(region.attributes());
             }
             self.hardware_is_configured_for.set(*app_id);
             config.is_dirty.set(false);

diff --git a/chips/sam4l/src/trng.rs b/chips/sam4l/src/trng.rs
@@ -62,19 +62,18 @@ impl<'a> Trng<'a> {
     }
 
     pub fn handle_interrupt(&self) {
-        let regs = &*self.regs;
-
-        regs.idr.write(Interrupt::DATRDY::SET);
+        self.regs.idr.write(Interrupt::DATRDY::SET);
 
         self.client.map(|client| {
             let result = client.entropy_available(&mut TrngIter(self), ReturnCode::SUCCESS);
             if let Continue::Done = result {
                 // disable controller
-                regs.cr
+                self.regs
+                    .cr
                     .write(Control::KEY.val(KEY) + Control::ENABLE::Disable);
                 pm::disable_clock(pm::Clock::PBA(pm::PBAClock::TRNG));
             } else {
-                regs.ier.write(Interrupt::DATRDY::SET);
+                self.regs.ier.write(Interrupt::DATRDY::SET);
             }
         });
     }
@@ -86,9 +85,8 @@ impl Iterator for TrngIter<'_, '_> {
     type Item = u32;
 
     fn next(&mut self) -> Option<u32> {
-        let regs = &*self.0.regs;
-        if regs.isr.is_set(Interrupt::DATRDY) {
-            Some(regs.odata.read(OutputData::ODATA))
+        if self.0.regs.isr.is_set(Interrupt::DATRDY) {
+            Some(self.0.regs.odata.read(OutputData::ODATA))
         } else {
             None
         }
@@ -97,12 +95,12 @@ impl Iterator for TrngIter<'_, '_> {
 
 impl<'a> entropy::Entropy32<'a> for Trng<'a> {
     fn get(&self) -> ReturnCode {
-        let regs = &*self.regs;
         pm::enable_clock(pm::Clock::PBA(pm::PBAClock::TRNG));
 
-        regs.cr
+        self.regs
+            .cr
             .write(Control::KEY.val(KEY) + Control::ENABLE::Enable);
-        regs.ier.write(Interrupt::DATRDY::SET);
+        self.regs.ier.write(Interrupt::DATRDY::SET);
         ReturnCode::SUCCESS
     }