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Merge #1690
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1690: added the possibility to add None gpio pins r=bradjc a=alexandruradovici

### Pull Request Overview

Following the discussion for #1675, this pull request adds the possibility to add None gpio pins, basically preserving pin index numbers when some of the gpio pins are not exported.

I make a change to:
- the gpio capsule, taking Option<&InterruptValuePin>
- the gpio_component_helper macro, so that boards may declare None pins

The format is a little strange, boards need to declare
````
Some => pin
// or
None => any_expression_here
````

Is there any way to check inside a macro if the value supplied is None (textual None) or an expression?

Any feedback is welcome.

Co-authored-by: Alexandru Radovici <msg4alex@gmail.com>
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@bors @alexandruradovici
bors[bot] and alexandruradovici committed May 15, 2020
2 parents cd0d123 + 7d52b3a commit d26dc29
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Showing 13 changed files with 432 additions and 349 deletions.
14 changes: 7 additions & 7 deletions boards/acd52832/src/main.rs
View file
Expand Up @@ -147,13 +147,13 @@ pub unsafe fn reset_handler() {
board_kernel,
components::gpio_component_helper!(
nrf52832::gpio::GPIOPin,
&nrf52832::gpio::PORT[Pin::P0_25],
&nrf52832::gpio::PORT[Pin::P0_26],
&nrf52832::gpio::PORT[Pin::P0_27],
&nrf52832::gpio::PORT[Pin::P0_28],
&nrf52832::gpio::PORT[Pin::P0_29],
&nrf52832::gpio::PORT[Pin::P0_30],
&nrf52832::gpio::PORT[Pin::P0_31]
0 => &nrf52832::gpio::PORT[Pin::P0_25],
1 => &nrf52832::gpio::PORT[Pin::P0_26],
2 => &nrf52832::gpio::PORT[Pin::P0_27],
3 => &nrf52832::gpio::PORT[Pin::P0_28],
4 => &nrf52832::gpio::PORT[Pin::P0_29],
5 => &nrf52832::gpio::PORT[Pin::P0_30],
6 => &nrf52832::gpio::PORT[Pin::P0_31]
),
)
.finalize(components::gpio_component_buf!(nrf52832::gpio::GPIOPin));
Expand Down
6 changes: 3 additions & 3 deletions boards/arty_e21/src/main.rs
View file
Expand Up @@ -187,9 +187,9 @@ pub unsafe fn reset_handler() {
board_kernel,
components::gpio_component_helper!(
arty_e21_chip::gpio::GpioPin,
&arty_e21_chip::gpio::PORT[7],
&arty_e21_chip::gpio::PORT[5],
&arty_e21_chip::gpio::PORT[6]
0 => &arty_e21_chip::gpio::PORT[7],
1 => &arty_e21_chip::gpio::PORT[5],
2 => &arty_e21_chip::gpio::PORT[6]
),
)
.finalize(components::gpio_component_buf!(
Expand Down
99 changes: 70 additions & 29 deletions boards/components/src/gpio.rs
View file
@@ -1,24 +1,42 @@
//! Components for GPIO pins.
//!
//!
//! Usage
//! -----
//! ```rust
//! let gpio = components::gpio::GpioComponent::new(
//! board_kernel,
//! components::gpio_component_helper!(
//! sam4l::gpio::GPIOPin,
//! &nrf52840::gpio::PORT[GPIO_D2],
//! &nrf52840::gpio::PORT[GPIO_D3],
//! &nrf52840::gpio::PORT[GPIO_D4],
//! &nrf52840::gpio::PORT[GPIO_D5],
//! &nrf52840::gpio::PORT[GPIO_D6],
//! &nrf52840::gpio::PORT[GPIO_D7],
//! &nrf52840::gpio::PORT[GPIO_D8],
//! &nrf52840::gpio::PORT[GPIO_D9],
//! &nrf52840::gpio::PORT[GPIO_D10]
//! )
//! )
//! .finalize(gpio_component_buf!(sam4l::gpio::GPIOPin));
//! nrf52840::gpio::GPIOPin,
//! // left side of the USB plug
//! 0 => &nrf52840::gpio::PORT[Pin::P0_13],
//! 1 => &nrf52840::gpio::PORT[Pin::P0_15],
//! 2 => &nrf52840::gpio::PORT[Pin::P0_17],
//! 3 => &nrf52840::gpio::PORT[Pin::P0_20],
//! 4 => &nrf52840::gpio::PORT[Pin::P0_22],
//! 5 => &nrf52840::gpio::PORT[Pin::P0_24],
//! 6 => &nrf52840::gpio::PORT[Pin::P1_00],
//! 7 => &nrf52840::gpio::PORT[Pin::P0_09],
//! 8 => &nrf52840::gpio::PORT[Pin::P0_10],
//! // right side of the USB plug
//! 9 => &nrf52840::gpio::PORT[Pin::P0_31],
//! 10 => &nrf52840::gpio::PORT[Pin::P0_29],
//! 11 => &nrf52840::gpio::PORT[Pin::P0_02],
//! 12 => &nrf52840::gpio::PORT[Pin::P1_15],
//! 13 => &nrf52840::gpio::PORT[Pin::P1_13],
//! 14 => &nrf52840::gpio::PORT[Pin::P1_10],
//! // Below the PCB
//! 15 => &nrf52840::gpio::PORT[Pin::P0_26],
//! 16 => &nrf52840::gpio::PORT[Pin::P0_04],
//! 17 => &nrf52840::gpio::PORT[Pin::P0_11],
//! 18 => &nrf52840::gpio::PORT[Pin::P0_14],
//! 19 => &nrf52840::gpio::PORT[Pin::P1_11],
//! 20 => &nrf52840::gpio::PORT[Pin::P1_07],
//! 21 => &nrf52840::gpio::PORT[Pin::P1_01],
//! 22 => &nrf52840::gpio::PORT[Pin::P1_04],
//! 23 => &nrf52840::gpio::PORT[Pin::P1_02]
//! ),
//! ).finalize(components::gpio_component_buf!(nrf52840::gpio::GPIOPin));
//! ```

use capsules::gpio::GPIO;
Expand All @@ -31,22 +49,43 @@ use kernel::hil::gpio::InterruptWithValue;
use kernel::static_init_half;

#[macro_export]
macro_rules! gpio_component_helper_max_pin {
() => { 0usize };
($a: expr, $b: expr, $($tail:expr,)*) => { $crate::gpio_component_helper_max_pin! (max ($a, $b), $($tail,)*) };
($a: expr,) => { $a };
}

#[macro_export]
/// Pins are declared using the following format:
/// number => pin
///
/// Any pin numbers that are skipped will be declared as None
/// and using them from user space will return ENODEVICE
macro_rules! gpio_component_helper {
($Pin:ty, $($P:expr),+ ) => {{
use kernel::static_init;
(
$Pin:ty,
$($nr:literal => $pin:expr),*
) => {{
use kernel::count_expressions;
use kernel::hil::gpio::InterruptValueWrapper;
const NUM_PINS: usize = count_expressions!($($P),+);
use kernel::static_init;

const fn max (a: usize, b: usize) -> usize {
[a, b][(a < b) as usize]
}

const NUM_PINS: usize = $crate::gpio_component_helper_max_pin! ($($nr,)*) + 1;

let mut pins = static_init!(
[Option<&'static InterruptValueWrapper<'static, $Pin>>; NUM_PINS],
[None; NUM_PINS]
);

$(
pins[$nr] = Some(static_init!(InterruptValueWrapper<$Pin>, InterruptValueWrapper::new($pin)).finalize());
)*

static_init!(
[&'static InterruptValueWrapper<'static, $Pin>; NUM_PINS],
[
$(
static_init!(InterruptValueWrapper<$Pin>, InterruptValueWrapper::new($P))
.finalize(),
)*
]
)
pins
};};
}

Expand All @@ -62,13 +101,13 @@ macro_rules! gpio_component_buf {

pub struct GpioComponent<IP: 'static + gpio::InterruptPin> {
board_kernel: &'static kernel::Kernel,
gpio_pins: &'static [&'static gpio::InterruptValueWrapper<'static, IP>],
gpio_pins: &'static [Option<&'static gpio::InterruptValueWrapper<'static, IP>>],
}

impl<IP: 'static + gpio::InterruptPin> GpioComponent<IP> {
pub fn new(
board_kernel: &'static kernel::Kernel,
gpio_pins: &'static [&'static gpio::InterruptValueWrapper<'static, IP>],
gpio_pins: &'static [Option<&'static gpio::InterruptValueWrapper<'static, IP>>],
) -> Self {
Self {
board_kernel: board_kernel,
Expand All @@ -88,8 +127,10 @@ impl<IP: 'static + gpio::InterruptPin> Component for GpioComponent<IP> {
GPIO<'static, IP>,
GPIO::new(self.gpio_pins, self.board_kernel.create_grant(&grant_cap))
);
for pin in self.gpio_pins.iter() {
pin.set_client(gpio);
for maybe_pin in self.gpio_pins.iter() {
if let Some(pin) = maybe_pin {
pin.set_client(gpio);
}
}

gpio
Expand Down
8 changes: 4 additions & 4 deletions boards/hail/src/main.rs
View file
Expand Up @@ -357,10 +357,10 @@ pub unsafe fn reset_handler() {
board_kernel,
components::gpio_component_helper!(
sam4l::gpio::GPIOPin,
&sam4l::gpio::PC[14], // D0
&sam4l::gpio::PC[15], // D1
&sam4l::gpio::PC[11], // D6
&sam4l::gpio::PC[12] // D7
0 => &sam4l::gpio::PC[14], // D0
1 => &sam4l::gpio::PC[15], // D1
2 => &sam4l::gpio::PC[11], // D6
3 => &sam4l::gpio::PC[12] // D7
),
)
.finalize(components::gpio_component_buf!(sam4l::gpio::GPIOPin));
Expand Down
14 changes: 7 additions & 7 deletions boards/imix/src/main.rs
View file
Expand Up @@ -344,13 +344,13 @@ pub unsafe fn reset_handler() {
board_kernel,
components::gpio_component_helper!(
sam4l::gpio::GPIOPin,
&sam4l::gpio::PC[31],
&sam4l::gpio::PC[30],
&sam4l::gpio::PC[29],
&sam4l::gpio::PC[28],
&sam4l::gpio::PC[27],
&sam4l::gpio::PC[26],
&sam4l::gpio::PA[20]
0 => &sam4l::gpio::PC[31],
1 => &sam4l::gpio::PC[30],
2 => &sam4l::gpio::PC[29],
3 => &sam4l::gpio::PC[28],
4 => &sam4l::gpio::PC[27],
5 => &sam4l::gpio::PC[26],
6 => &sam4l::gpio::PA[20]
),
)
.finalize(components::gpio_component_buf!(sam4l::gpio::GPIOPin));
Expand Down
2 changes: 1 addition & 1 deletion boards/launchxl/src/main.rs
View file
Expand Up @@ -257,7 +257,7 @@ pub unsafe fn reset_handler() {
cc26x2::gpio::GPIOPin,
// This is the order they appear on the launchxl headers.
// Pins 5, 8, 11, 29, 30
&cc26x2::gpio::PORT[pinmap.gpio0]
0 => &cc26x2::gpio::PORT[pinmap.gpio0]
),
)
.finalize(components::gpio_component_buf!(cc26x2::gpio::GPIOPin));
Expand Down
48 changes: 24 additions & 24 deletions boards/nordic/nrf52840_dongle/src/main.rs
View file
Expand Up @@ -71,32 +71,32 @@ pub unsafe fn reset_handler() {
components::gpio_component_helper!(
nrf52840::gpio::GPIOPin,
// left side of the USB plug
&nrf52840::gpio::PORT[Pin::P0_13],
&nrf52840::gpio::PORT[Pin::P0_15],
&nrf52840::gpio::PORT[Pin::P0_17],
&nrf52840::gpio::PORT[Pin::P0_20],
&nrf52840::gpio::PORT[Pin::P0_22],
&nrf52840::gpio::PORT[Pin::P0_24],
&nrf52840::gpio::PORT[Pin::P1_00],
&nrf52840::gpio::PORT[Pin::P0_09],
&nrf52840::gpio::PORT[Pin::P0_10],
0 => &nrf52840::gpio::PORT[Pin::P0_13],
1 => &nrf52840::gpio::PORT[Pin::P0_15],
2 => &nrf52840::gpio::PORT[Pin::P0_17],
3 => &nrf52840::gpio::PORT[Pin::P0_20],
4 => &nrf52840::gpio::PORT[Pin::P0_22],
5 => &nrf52840::gpio::PORT[Pin::P0_24],
6 => &nrf52840::gpio::PORT[Pin::P1_00],
7 => &nrf52840::gpio::PORT[Pin::P0_09],
8 => &nrf52840::gpio::PORT[Pin::P0_10],
// right side of the USB plug
&nrf52840::gpio::PORT[Pin::P0_31],
&nrf52840::gpio::PORT[Pin::P0_29],
&nrf52840::gpio::PORT[Pin::P0_02],
&nrf52840::gpio::PORT[Pin::P1_15],
&nrf52840::gpio::PORT[Pin::P1_13],
&nrf52840::gpio::PORT[Pin::P1_10],
9 => &nrf52840::gpio::PORT[Pin::P0_31],
10 => &nrf52840::gpio::PORT[Pin::P0_29],
11 => &nrf52840::gpio::PORT[Pin::P0_02],
12 => &nrf52840::gpio::PORT[Pin::P1_15],
13 => &nrf52840::gpio::PORT[Pin::P1_13],
14 => &nrf52840::gpio::PORT[Pin::P1_10],
// Below the PCB
&nrf52840::gpio::PORT[Pin::P0_26],
&nrf52840::gpio::PORT[Pin::P0_04],
&nrf52840::gpio::PORT[Pin::P0_11],
&nrf52840::gpio::PORT[Pin::P0_14],
&nrf52840::gpio::PORT[Pin::P1_11],
&nrf52840::gpio::PORT[Pin::P1_07],
&nrf52840::gpio::PORT[Pin::P1_01],
&nrf52840::gpio::PORT[Pin::P1_04],
&nrf52840::gpio::PORT[Pin::P1_02]
15 => &nrf52840::gpio::PORT[Pin::P0_26],
16 => &nrf52840::gpio::PORT[Pin::P0_04],
17 => &nrf52840::gpio::PORT[Pin::P0_11],
18 => &nrf52840::gpio::PORT[Pin::P0_14],
19 => &nrf52840::gpio::PORT[Pin::P1_11],
20 => &nrf52840::gpio::PORT[Pin::P1_07],
21 => &nrf52840::gpio::PORT[Pin::P1_01],
22 => &nrf52840::gpio::PORT[Pin::P1_04],
23 => &nrf52840::gpio::PORT[Pin::P1_02]
),
)
.finalize(components::gpio_component_buf!(nrf52840::gpio::GPIOPin));
Expand Down
32 changes: 16 additions & 16 deletions boards/nordic/nrf52840dk/src/main.rs
View file
Expand Up @@ -152,22 +152,22 @@ pub unsafe fn reset_handler() {
board_kernel,
components::gpio_component_helper!(
nrf52840::gpio::GPIOPin,
&nrf52840::gpio::PORT[Pin::P1_01],
&nrf52840::gpio::PORT[Pin::P1_02],
&nrf52840::gpio::PORT[Pin::P1_03],
&nrf52840::gpio::PORT[Pin::P1_04],
&nrf52840::gpio::PORT[Pin::P1_05],
&nrf52840::gpio::PORT[Pin::P1_06],
&nrf52840::gpio::PORT[Pin::P1_07],
&nrf52840::gpio::PORT[Pin::P1_08],
&nrf52840::gpio::PORT[Pin::P1_10],
&nrf52840::gpio::PORT[Pin::P1_11],
&nrf52840::gpio::PORT[Pin::P1_12],
&nrf52840::gpio::PORT[Pin::P1_13],
&nrf52840::gpio::PORT[Pin::P1_14],
&nrf52840::gpio::PORT[Pin::P1_15],
&nrf52840::gpio::PORT[Pin::P0_26],
&nrf52840::gpio::PORT[Pin::P0_27]
0 => &nrf52840::gpio::PORT[Pin::P1_01],
1 => &nrf52840::gpio::PORT[Pin::P1_02],
2 => &nrf52840::gpio::PORT[Pin::P1_03],
3 => &nrf52840::gpio::PORT[Pin::P1_04],
4 => &nrf52840::gpio::PORT[Pin::P1_05],
5 => &nrf52840::gpio::PORT[Pin::P1_06],
6 => &nrf52840::gpio::PORT[Pin::P1_07],
7 => &nrf52840::gpio::PORT[Pin::P1_08],
8 => &nrf52840::gpio::PORT[Pin::P1_10],
9 => &nrf52840::gpio::PORT[Pin::P1_11],
10 => &nrf52840::gpio::PORT[Pin::P1_12],
11 => &nrf52840::gpio::PORT[Pin::P1_13],
12 => &nrf52840::gpio::PORT[Pin::P1_14],
13 => &nrf52840::gpio::PORT[Pin::P1_15],
14 => &nrf52840::gpio::PORT[Pin::P0_26],
15 => &nrf52840::gpio::PORT[Pin::P0_27]
),
)
.finalize(components::gpio_component_buf!(nrf52840::gpio::GPIOPin));
Expand Down
24 changes: 12 additions & 12 deletions boards/nordic/nrf52dk/src/main.rs
View file
Expand Up @@ -135,20 +135,20 @@ pub unsafe fn reset_handler() {
components::gpio_component_helper!(
nrf52832::gpio::GPIOPin,
// Bottom right header on DK board
&nrf52832::gpio::PORT[Pin::P0_03],
&nrf52832::gpio::PORT[Pin::P0_04],
&nrf52832::gpio::PORT[Pin::P0_28],
&nrf52832::gpio::PORT[Pin::P0_29],
&nrf52832::gpio::PORT[Pin::P0_30],
&nrf52832::gpio::PORT[Pin::P0_31],
0 => &nrf52832::gpio::PORT[Pin::P0_03],
1 => &nrf52832::gpio::PORT[Pin::P0_04],
2 => &nrf52832::gpio::PORT[Pin::P0_28],
3 => &nrf52832::gpio::PORT[Pin::P0_29],
4 => &nrf52832::gpio::PORT[Pin::P0_30],
5 => &nrf52832::gpio::PORT[Pin::P0_31],
// Top mid header on DK board
&nrf52832::gpio::PORT[Pin::P0_12],
&nrf52832::gpio::PORT[Pin::P0_11],
6 => &nrf52832::gpio::PORT[Pin::P0_12],
7 => &nrf52832::gpio::PORT[Pin::P0_11],
// Top left header on DK board
&nrf52832::gpio::PORT[Pin::P0_27],
&nrf52832::gpio::PORT[Pin::P0_26],
&nrf52832::gpio::PORT[Pin::P0_02],
&nrf52832::gpio::PORT[Pin::P0_25]
8 => &nrf52832::gpio::PORT[Pin::P0_27],
9 => &nrf52832::gpio::PORT[Pin::P0_26],
10 => &nrf52832::gpio::PORT[Pin::P0_02],
11 => &nrf52832::gpio::PORT[Pin::P0_25]
),
)
.finalize(components::gpio_component_buf!(nrf52832::gpio::GPIOPin));
Expand Down

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