RISC-V: General PMP Improvements #1821
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Currently when disabling the PMP we zero out all 16 cfg registers. Let's just zero out the ones we are actually using for the chip to save cycles. Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Instead of setting the pmpcfg registers in four read/writes just do it in a single one. Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2 tasks
2 tasks
bradjc
approved these changes
May 5, 2020
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bors r+ |
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Pull Request Overview
This PR reduces the number of instructions to enable/disable the PMP. It does this by looping over less registers when disabling PMP and by consolidating the read/write instructions to a single operation.
Testing Strategy
Tested by running Tock on QEMU for OpenTitan and HiFive1.
TODO or Help Wanted
Documentation Updated
/docs, or no updates are required.Formatting
make formatall.