chips: apollo3: Enable the I and D cache #1989
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ppannuto
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Jun 29, 2020
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This is probably a good thing, but I wouldn't be completely surprised if there are one or two tricky things with caching that we are getting wrong elsewhere in Tock, as I think this might be the first core that has a meaningful cache. It was only by chance that we added the barriers to the context switch code relatively recently.
This isn't meant to say "we shouldn't do this" in any way, simply that if there are weird bugs that start cropping up, it would be believable
bradjc
previously approved these changes
Jul 1, 2020
Signed-off-by: Alistair Francis <alistair@alistair23.me>
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ppannuto
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Jul 6, 2020
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Pull Request Overview
This PR enables the I and D cache for the Apollo3.
Testing Strategy
Running on the board.
TODO or Help Wanted
Documentation Updated
/docs, or no updates are required.Formatting
make prepush.