Stm32f3: add flash support

boards/stm32f3discovery/src/main.rs

@@ -62,6 +62,7 @@ struct STM32F3Discovery {
         VirtualMuxAlarm<'static, stm32f303xc::tim2::Tim2<'static>>,
     >,
     adc: &'static capsules::adc::Adc<'static, stm32f303xc::adc::Adc>,
+    nonvolatile_storage: &'static capsules::nonvolatile_storage_driver::NonvolatileStorage<'static>,
 }
 
 /// Mapping of integer syscalls to objects that implement syscalls.
@@ -82,6 +83,7 @@ impl Platform for STM32F3Discovery {
             capsules::temperature::DRIVER_NUM => f(Some(self.temp)),
             kernel::ipc::DRIVER_NUM => f(Some(&self.ipc)),
             capsules::adc::DRIVER_NUM => f(Some(self.adc)),
+            capsules::nonvolatile_storage_driver::DRIVER_NUM => f(Some(self.nonvolatile_storage)),
             _ => f(None),
         }
     }
@@ -607,6 +609,18 @@ pub unsafe fn reset_handler() {
     );
     stm32f303xc::adc::ADC1.set_client(adc);
 
+    let nonvolatile_storage = components::nonvolatile_storage::NonvolatileStorageComponent::new(
+        board_kernel,
+        &stm32f303xc::flash::FLASH,
+        0x08020000,
+        0x20000,
+        0x08000000,
+        0x20000,
+    )
+    .finalize(components::nv_storage_component_helper!(
+        stm32f303xc::flash::Flash
+    ));
+
     let stm32f3discovery = STM32F3Discovery {
         console: console,
         ipc: kernel::ipc::IPC::new(board_kernel, &memory_allocation_capability),
@@ -619,6 +633,7 @@ pub unsafe fn reset_handler() {
         ninedof: ninedof,
         temp: temp,
         adc: adc,
+        nonvolatile_storage: nonvolatile_storage,
     };
 
     // // Optional kernel tests

chips/stm32f303xc/src/chip.rs

@@ -6,7 +6,9 @@ use kernel::common::deferred_call;
 use kernel::Chip;
 
 use crate::adc;
+use crate::deferred_call_tasks::DeferredCallTask;
 use crate::exti;
+use crate::flash;
 use crate::i2c;
 use crate::nvic;
 use crate::spi;
@@ -38,14 +40,20 @@ impl Chip for Stm32f3xx {
     fn service_pending_interrupts(&self) {
         unsafe {
             loop {
-                if let Some(interrupt) = cortexm4::nvic::next_pending() {
+                if let Some(task) = deferred_call::DeferredCall::next_pending() {
+                    match task {
+                        DeferredCallTask::Flash => flash::FLASH.handle_interrupt(),
+                    }
+                } else if let Some(interrupt) = cortexm4::nvic::next_pending() {
                     match interrupt {
                         nvic::USART1 => usart::USART1.handle_interrupt(),
 
                         nvic::TIM2 => tim2::TIM2.handle_interrupt(),
 
                         nvic::SPI1 => spi::SPI1.handle_interrupt(),
 
+                        nvic::FLASH => flash::FLASH.handle_interrupt(),
+
                         nvic::I2C1_EV => i2c::I2C1.handle_event(),
                         nvic::I2C1_ER => i2c::I2C1.handle_error(),
                         nvic::ADC1_2 => adc::ADC1.handle_interrupt(),

chips/stm32f303xc/src/deferred_call_tasks.rs

@@ -0,0 +1,30 @@
+//! Definition of Deferred Call tasks.
+//!
+//! Deferred calls also peripheral drivers to register pseudo interrupts.
+//! These are the definitions of which deferred calls this chip needs.
+
+use core::convert::Into;
+use core::convert::TryFrom;
+
+/// A type of task to defer a call for
+#[derive(Copy, Clone)]
+pub enum DeferredCallTask {
+    Flash = 0,
+}
+
+impl TryFrom<usize> for DeferredCallTask {
+    type Error = ();
+
+    fn try_from(value: usize) -> Result<DeferredCallTask, ()> {
+        match value {
+            0 => Ok(DeferredCallTask::Flash),
+            _ => Err(()),
+        }
+    }
+}
+
+impl Into<usize> for DeferredCallTask {
+    fn into(self) -> usize {
+        self as usize
+    }
+}