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Make .storage alignment configurable #2090

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Sep 10, 2020
Merged

Make .storage alignment configurable #2090

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1 change: 1 addition & 0 deletions boards/acd52832/layout.ld
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Expand Up @@ -7,5 +7,6 @@ MEMORY
}

MPU_MIN_ALIGN = 8K;
PAGE_SIZE = 4K;

INCLUDE ../kernel_layout.ld
16 changes: 9 additions & 7 deletions boards/kernel_layout.ld
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@@ -1,8 +1,9 @@
/*
* This is the generic linker script for Tock. For most developers, it should
* be sufficient to define {ROM/PROG/RAM}_{ORIGIN/LENGTH} (6 variables, the
* start and length for each) and MPU_MIN_ALIGN (the minimum alignment
* granularity supported by the MPU).
* start and length for each), MPU_MIN_ALIGN (the minimum alignment
* granularity supported by the MPU) and PAGE_SIZE (the size of a flash page).
* If undefined, PAGE_SIZE uses the default value of 512 bytes.
*
* --------------------------------------------------------------------------
*
Expand Down Expand Up @@ -35,6 +36,7 @@
* pointing to next address after application RAM.
*/

PAGE_SIZE = DEFINED(PAGE_SIZE) ? PAGE_SIZE : 512;

SECTIONS
{
Expand Down Expand Up @@ -186,18 +188,18 @@ SECTIONS

/* Region for on-chip kernel non-volatile storage.
*
* Align on 512 bytes since that is the page size. Volumes within this
* region are allocated with the storage_volume! macro in utils.rs.
* Align on PAGE_SIZE number of bytes. Volumes within this region are
* allocated with the storage_volume! macro in utils.rs.
*/
.storage :
{
. = ALIGN(512);
. = ALIGN(PAGE_SIZE);
_sstorage = .;
*(.storage* storage*)
_estorage = .;
. = ALIGN(512);
. = ALIGN(PAGE_SIZE);
} > rom
. = ALIGN(512);
. = ALIGN(PAGE_SIZE);

/* Mark the end of static elements */
. = ALIGN(4);
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1 change: 1 addition & 0 deletions boards/msp_exp432p401r/chip_layout.ld
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Expand Up @@ -7,3 +7,4 @@ MEMORY
}

MPU_MIN_ALIGN = 8K;
PAGE_SIZE = 4K;
1 change: 1 addition & 0 deletions boards/nano33ble/layout.ld
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Expand Up @@ -6,5 +6,6 @@ MEMORY
}

MPU_MIN_ALIGN = 8K;
PAGE_SIZE = 4K;

INCLUDE ../kernel_layout.ld
1 change: 1 addition & 0 deletions boards/nordic/nrf52832_chip_layout.ld
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Expand Up @@ -7,3 +7,4 @@ MEMORY
}

MPU_MIN_ALIGN = 8K;
PAGE_SIZE = 4K;
1 change: 1 addition & 0 deletions boards/nordic/nrf52840_chip_layout.ld
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Expand Up @@ -7,3 +7,4 @@ MEMORY
}

MPU_MIN_ALIGN = 8K;
PAGE_SIZE = 4K;
1 change: 1 addition & 0 deletions boards/nucleo_f429zi/chip_layout.ld
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Expand Up @@ -12,3 +12,4 @@ MEMORY
}

MPU_MIN_ALIGN = 8K;
PAGE_SIZE = 2K;
1 change: 1 addition & 0 deletions boards/nucleo_f446re/chip_layout.ld
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Expand Up @@ -12,3 +12,4 @@ MEMORY
}

MPU_MIN_ALIGN = 8K;
PAGE_SIZE = 2K;
3 changes: 2 additions & 1 deletion boards/redboard_artemis_nano/layout.ld
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Expand Up @@ -6,5 +6,6 @@ MEMORY
}

MPU_MIN_ALIGN = 8K;
PAGE_SIZE = 8K;

INCLUDE ../kernel_layout.ld
INCLUDE ../kernel_layout.ld
1 change: 1 addition & 0 deletions boards/stm32f3discovery/chip_layout.ld
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Expand Up @@ -12,3 +12,4 @@ MEMORY
}

MPU_MIN_ALIGN = 8K;
PAGE_SIZE = 2K;