Furthoremore did some exploratory work on USART1

By adding the missing interrupt handlers.

Instead of providing a Dma1Clock and a Dma2Clock, we can use a shared
class for both DMA's, as they share the exact same code.

To reduce the code duplication between Dma1&Dma2, the Stream class is
moved into the shared Dma module.
Dma1 and Dma2 then implement the new StreamServer trait, that allows
them to serve their own Streams.

A further refactoring is achieved by adding a StreamPeripheral trait,
which is implmeneted in Dma1Peripheral & Dma2Peripheral and returns all
the constants that might be different between DMA peripherals.
This way the dma::Stream never has to match over the peripheral, but
only ever over to stream to access the correct registers. The data to
write into the registers will be provided by the Peripheral.
This should also make adding new peripherals cleaner, as the Stream
doesn't need to be touched, but only the Peripheral enum.

Not all boards will use the new Dma features, but they must still be
adapted to fit the new API.

The dma1 and dma2 submodules were too small to justify their existence -
therefore it makes more sense to combine their code into a single dma
module.