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RDMA/irdma: Add miscellaneous utility definitions
Add miscellaneous utility functions and headers. Link: https://lore.kernel.org/r/20210602205138.889-13-shiraz.saleem@intel.com Signed-off-by: Mustafa Ismail <mustafa.ismail@intel.com> Signed-off-by: Shiraz Saleem <shiraz.saleem@intel.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
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| /* SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB */ | ||
| /* Copyright (c) 2015 - 2021 Intel Corporation */ | ||
| #ifndef IRDMA_OSDEP_H | ||
| #define IRDMA_OSDEP_H | ||
|
|
||
| #include <linux/pci.h> | ||
| #include <linux/bitfield.h> | ||
| #include <crypto/hash.h> | ||
| #include <rdma/ib_verbs.h> | ||
|
|
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| #define STATS_TIMER_DELAY 60000 | ||
|
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| struct irdma_dma_info { | ||
| dma_addr_t *dmaaddrs; | ||
| }; | ||
|
|
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| struct irdma_dma_mem { | ||
| void *va; | ||
| dma_addr_t pa; | ||
| u32 size; | ||
| } __packed; | ||
|
|
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| struct irdma_virt_mem { | ||
| void *va; | ||
| u32 size; | ||
| } __packed; | ||
|
|
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| struct irdma_sc_vsi; | ||
| struct irdma_sc_dev; | ||
| struct irdma_sc_qp; | ||
| struct irdma_puda_buf; | ||
| struct irdma_puda_cmpl_info; | ||
| struct irdma_update_sds_info; | ||
| struct irdma_hmc_fcn_info; | ||
| struct irdma_manage_vf_pble_info; | ||
| struct irdma_hw; | ||
| struct irdma_pci_f; | ||
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| struct ib_device *to_ibdev(struct irdma_sc_dev *dev); | ||
| u8 __iomem *irdma_get_hw_addr(void *dev); | ||
| void irdma_ieq_mpa_crc_ae(struct irdma_sc_dev *dev, struct irdma_sc_qp *qp); | ||
| enum irdma_status_code irdma_vf_wait_vchnl_resp(struct irdma_sc_dev *dev); | ||
| bool irdma_vf_clear_to_send(struct irdma_sc_dev *dev); | ||
| void irdma_add_dev_ref(struct irdma_sc_dev *dev); | ||
| void irdma_put_dev_ref(struct irdma_sc_dev *dev); | ||
| enum irdma_status_code irdma_ieq_check_mpacrc(struct shash_desc *desc, | ||
| void *addr, u32 len, u32 val); | ||
| struct irdma_sc_qp *irdma_ieq_get_qp(struct irdma_sc_dev *dev, | ||
| struct irdma_puda_buf *buf); | ||
| void irdma_send_ieq_ack(struct irdma_sc_qp *qp); | ||
| void irdma_ieq_update_tcpip_info(struct irdma_puda_buf *buf, u16 len, | ||
| u32 seqnum); | ||
| void irdma_free_hash_desc(struct shash_desc *hash_desc); | ||
| enum irdma_status_code irdma_init_hash_desc(struct shash_desc **hash_desc); | ||
| enum irdma_status_code | ||
| irdma_puda_get_tcpip_info(struct irdma_puda_cmpl_info *info, | ||
| struct irdma_puda_buf *buf); | ||
| enum irdma_status_code irdma_cqp_sds_cmd(struct irdma_sc_dev *dev, | ||
| struct irdma_update_sds_info *info); | ||
| enum irdma_status_code | ||
| irdma_cqp_manage_hmc_fcn_cmd(struct irdma_sc_dev *dev, | ||
| struct irdma_hmc_fcn_info *hmcfcninfo, | ||
| u16 *pmf_idx); | ||
| enum irdma_status_code | ||
| irdma_cqp_query_fpm_val_cmd(struct irdma_sc_dev *dev, | ||
| struct irdma_dma_mem *val_mem, u8 hmc_fn_id); | ||
| enum irdma_status_code | ||
| irdma_cqp_commit_fpm_val_cmd(struct irdma_sc_dev *dev, | ||
| struct irdma_dma_mem *val_mem, u8 hmc_fn_id); | ||
| enum irdma_status_code irdma_alloc_query_fpm_buf(struct irdma_sc_dev *dev, | ||
| struct irdma_dma_mem *mem); | ||
| void *irdma_remove_cqp_head(struct irdma_sc_dev *dev); | ||
| void irdma_term_modify_qp(struct irdma_sc_qp *qp, u8 next_state, u8 term, | ||
| u8 term_len); | ||
| void irdma_terminate_done(struct irdma_sc_qp *qp, int timeout_occurred); | ||
| void irdma_terminate_start_timer(struct irdma_sc_qp *qp); | ||
| void irdma_terminate_del_timer(struct irdma_sc_qp *qp); | ||
| void irdma_hw_stats_start_timer(struct irdma_sc_vsi *vsi); | ||
| void irdma_hw_stats_stop_timer(struct irdma_sc_vsi *vsi); | ||
| void wr32(struct irdma_hw *hw, u32 reg, u32 val); | ||
| u32 rd32(struct irdma_hw *hw, u32 reg); | ||
| u64 rd64(struct irdma_hw *hw, u32 reg); | ||
| enum irdma_status_code irdma_map_vm_page_list(struct irdma_hw *hw, void *va, | ||
| dma_addr_t *pg_dma, u32 pg_cnt); | ||
| void irdma_unmap_vm_page_list(struct irdma_hw *hw, dma_addr_t *pg_dma, u32 pg_cnt); | ||
| #endif /* IRDMA_OSDEP_H */ |
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| @@ -0,0 +1,116 @@ | ||
| /* SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB */ | ||
| /* Copyright (c) 2016 - 2021 Intel Corporation */ | ||
| #ifndef IRDMA_PROTOS_H | ||
| #define IRDMA_PROTOS_H | ||
|
|
||
| #define PAUSE_TIMER_VAL 0xffff | ||
| #define REFRESH_THRESHOLD 0x7fff | ||
| #define HIGH_THRESHOLD 0x800 | ||
| #define LOW_THRESHOLD 0x200 | ||
| #define ALL_TC2PFC 0xff | ||
| #define CQP_COMPL_WAIT_TIME_MS 10 | ||
| #define CQP_TIMEOUT_THRESHOLD 500 | ||
|
|
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| /* init operations */ | ||
| enum irdma_status_code irdma_sc_dev_init(enum irdma_vers ver, | ||
| struct irdma_sc_dev *dev, | ||
| struct irdma_device_init_info *info); | ||
| void irdma_sc_rt_init(struct irdma_sc_dev *dev); | ||
| void irdma_sc_cqp_post_sq(struct irdma_sc_cqp *cqp); | ||
| __le64 *irdma_sc_cqp_get_next_send_wqe(struct irdma_sc_cqp *cqp, u64 scratch); | ||
| enum irdma_status_code | ||
| irdma_sc_mr_fast_register(struct irdma_sc_qp *qp, | ||
| struct irdma_fast_reg_stag_info *info, bool post_sq); | ||
| /* HMC/FPM functions */ | ||
| enum irdma_status_code irdma_sc_init_iw_hmc(struct irdma_sc_dev *dev, | ||
| u8 hmc_fn_id); | ||
| /* stats misc */ | ||
| enum irdma_status_code | ||
| irdma_cqp_gather_stats_cmd(struct irdma_sc_dev *dev, | ||
| struct irdma_vsi_pestat *pestat, bool wait); | ||
| void irdma_cqp_gather_stats_gen1(struct irdma_sc_dev *dev, | ||
| struct irdma_vsi_pestat *pestat); | ||
| void irdma_hw_stats_read_all(struct irdma_vsi_pestat *stats, | ||
| struct irdma_dev_hw_stats *stats_values, | ||
| u64 *hw_stats_regs_32, u64 *hw_stats_regs_64, | ||
| u8 hw_rev); | ||
| enum irdma_status_code | ||
| irdma_cqp_ws_node_cmd(struct irdma_sc_dev *dev, u8 cmd, | ||
| struct irdma_ws_node_info *node_info); | ||
| enum irdma_status_code irdma_cqp_up_map_cmd(struct irdma_sc_dev *dev, u8 cmd, | ||
| struct irdma_up_info *map_info); | ||
| enum irdma_status_code irdma_cqp_ceq_cmd(struct irdma_sc_dev *dev, | ||
| struct irdma_sc_ceq *sc_ceq, u8 op); | ||
| enum irdma_status_code irdma_cqp_aeq_cmd(struct irdma_sc_dev *dev, | ||
| struct irdma_sc_aeq *sc_aeq, u8 op); | ||
| enum irdma_status_code | ||
| irdma_cqp_stats_inst_cmd(struct irdma_sc_vsi *vsi, u8 cmd, | ||
| struct irdma_stats_inst_info *stats_info); | ||
| u16 irdma_alloc_ws_node_id(struct irdma_sc_dev *dev); | ||
| void irdma_free_ws_node_id(struct irdma_sc_dev *dev, u16 node_id); | ||
| void irdma_update_stats(struct irdma_dev_hw_stats *hw_stats, | ||
| struct irdma_gather_stats *gather_stats, | ||
| struct irdma_gather_stats *last_gather_stats); | ||
| /* vsi functions */ | ||
| enum irdma_status_code irdma_vsi_stats_init(struct irdma_sc_vsi *vsi, | ||
| struct irdma_vsi_stats_info *info); | ||
| void irdma_vsi_stats_free(struct irdma_sc_vsi *vsi); | ||
| void irdma_sc_vsi_init(struct irdma_sc_vsi *vsi, | ||
| struct irdma_vsi_init_info *info); | ||
| enum irdma_status_code irdma_sc_add_cq_ctx(struct irdma_sc_ceq *ceq, | ||
| struct irdma_sc_cq *cq); | ||
| void irdma_sc_remove_cq_ctx(struct irdma_sc_ceq *ceq, struct irdma_sc_cq *cq); | ||
| /* misc L2 param change functions */ | ||
| void irdma_change_l2params(struct irdma_sc_vsi *vsi, | ||
| struct irdma_l2params *l2params); | ||
| void irdma_sc_suspend_resume_qps(struct irdma_sc_vsi *vsi, u8 suspend); | ||
| enum irdma_status_code irdma_cqp_qp_suspend_resume(struct irdma_sc_qp *qp, | ||
| u8 cmd); | ||
| void irdma_qp_add_qos(struct irdma_sc_qp *qp); | ||
| void irdma_qp_rem_qos(struct irdma_sc_qp *qp); | ||
| struct irdma_sc_qp *irdma_get_qp_from_list(struct list_head *head, | ||
| struct irdma_sc_qp *qp); | ||
| void irdma_reinitialize_ieq(struct irdma_sc_vsi *vsi); | ||
| u16 irdma_alloc_ws_node_id(struct irdma_sc_dev *dev); | ||
| void irdma_free_ws_node_id(struct irdma_sc_dev *dev, u16 node_id); | ||
| /* terminate functions*/ | ||
| void irdma_terminate_send_fin(struct irdma_sc_qp *qp); | ||
|
|
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| void irdma_terminate_connection(struct irdma_sc_qp *qp, | ||
| struct irdma_aeqe_info *info); | ||
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| void irdma_terminate_received(struct irdma_sc_qp *qp, | ||
| struct irdma_aeqe_info *info); | ||
| /* dynamic memory allocation */ | ||
| /* misc */ | ||
| u8 irdma_get_encoded_wqe_size(u32 wqsize, enum irdma_queue_type queue_type); | ||
| void irdma_modify_qp_to_err(struct irdma_sc_qp *sc_qp); | ||
| enum irdma_status_code | ||
| irdma_sc_static_hmc_pages_allocated(struct irdma_sc_cqp *cqp, u64 scratch, | ||
| u8 hmc_fn_id, bool post_sq, | ||
| bool poll_registers); | ||
| enum irdma_status_code irdma_cfg_fpm_val(struct irdma_sc_dev *dev, | ||
| u32 qp_count); | ||
| enum irdma_status_code irdma_get_rdma_features(struct irdma_sc_dev *dev); | ||
| void free_sd_mem(struct irdma_sc_dev *dev); | ||
| enum irdma_status_code irdma_process_cqp_cmd(struct irdma_sc_dev *dev, | ||
| struct cqp_cmds_info *pcmdinfo); | ||
| enum irdma_status_code irdma_process_bh(struct irdma_sc_dev *dev); | ||
| enum irdma_status_code irdma_cqp_sds_cmd(struct irdma_sc_dev *dev, | ||
| struct irdma_update_sds_info *info); | ||
| enum irdma_status_code | ||
| irdma_cqp_query_fpm_val_cmd(struct irdma_sc_dev *dev, | ||
| struct irdma_dma_mem *val_mem, u8 hmc_fn_id); | ||
| enum irdma_status_code | ||
| irdma_cqp_commit_fpm_val_cmd(struct irdma_sc_dev *dev, | ||
| struct irdma_dma_mem *val_mem, u8 hmc_fn_id); | ||
| enum irdma_status_code irdma_alloc_query_fpm_buf(struct irdma_sc_dev *dev, | ||
| struct irdma_dma_mem *mem); | ||
| enum irdma_status_code | ||
| irdma_cqp_manage_hmc_fcn_cmd(struct irdma_sc_dev *dev, | ||
| struct irdma_hmc_fcn_info *hmcfcninfo, | ||
| u16 *pmf_idx); | ||
| void irdma_add_dev_ref(struct irdma_sc_dev *dev); | ||
| void irdma_put_dev_ref(struct irdma_sc_dev *dev); | ||
| void *irdma_remove_cqp_head(struct irdma_sc_dev *dev); | ||
| #endif /* IRDMA_PROTOS_H */ |
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| @@ -0,0 +1,71 @@ | ||
| /* SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB */ | ||
| /* Copyright (c) 2015 - 2020 Intel Corporation */ | ||
| #ifndef IRDMA_STATUS_H | ||
| #define IRDMA_STATUS_H | ||
|
|
||
| /* Error Codes */ | ||
| enum irdma_status_code { | ||
| IRDMA_SUCCESS = 0, | ||
| IRDMA_ERR_NVM = -1, | ||
| IRDMA_ERR_NVM_CHECKSUM = -2, | ||
| IRDMA_ERR_CFG = -4, | ||
| IRDMA_ERR_PARAM = -5, | ||
| IRDMA_ERR_DEVICE_NOT_SUPPORTED = -6, | ||
| IRDMA_ERR_RESET_FAILED = -7, | ||
| IRDMA_ERR_SWFW_SYNC = -8, | ||
| IRDMA_ERR_NO_MEMORY = -9, | ||
| IRDMA_ERR_BAD_PTR = -10, | ||
| IRDMA_ERR_INVALID_PD_ID = -11, | ||
| IRDMA_ERR_INVALID_QP_ID = -12, | ||
| IRDMA_ERR_INVALID_CQ_ID = -13, | ||
| IRDMA_ERR_INVALID_CEQ_ID = -14, | ||
| IRDMA_ERR_INVALID_AEQ_ID = -15, | ||
| IRDMA_ERR_INVALID_SIZE = -16, | ||
| IRDMA_ERR_INVALID_ARP_INDEX = -17, | ||
| IRDMA_ERR_INVALID_FPM_FUNC_ID = -18, | ||
| IRDMA_ERR_QP_INVALID_MSG_SIZE = -19, | ||
| IRDMA_ERR_QP_TOOMANY_WRS_POSTED = -20, | ||
| IRDMA_ERR_INVALID_FRAG_COUNT = -21, | ||
| IRDMA_ERR_Q_EMPTY = -22, | ||
| IRDMA_ERR_INVALID_ALIGNMENT = -23, | ||
| IRDMA_ERR_FLUSHED_Q = -24, | ||
| IRDMA_ERR_INVALID_PUSH_PAGE_INDEX = -25, | ||
| IRDMA_ERR_INVALID_INLINE_DATA_SIZE = -26, | ||
| IRDMA_ERR_TIMEOUT = -27, | ||
| IRDMA_ERR_OPCODE_MISMATCH = -28, | ||
| IRDMA_ERR_CQP_COMPL_ERROR = -29, | ||
| IRDMA_ERR_INVALID_VF_ID = -30, | ||
| IRDMA_ERR_INVALID_HMCFN_ID = -31, | ||
| IRDMA_ERR_BACKING_PAGE_ERROR = -32, | ||
| IRDMA_ERR_NO_PBLCHUNKS_AVAILABLE = -33, | ||
| IRDMA_ERR_INVALID_PBLE_INDEX = -34, | ||
| IRDMA_ERR_INVALID_SD_INDEX = -35, | ||
| IRDMA_ERR_INVALID_PAGE_DESC_INDEX = -36, | ||
| IRDMA_ERR_INVALID_SD_TYPE = -37, | ||
| IRDMA_ERR_MEMCPY_FAILED = -38, | ||
| IRDMA_ERR_INVALID_HMC_OBJ_INDEX = -39, | ||
| IRDMA_ERR_INVALID_HMC_OBJ_COUNT = -40, | ||
| IRDMA_ERR_BUF_TOO_SHORT = -43, | ||
| IRDMA_ERR_BAD_IWARP_CQE = -44, | ||
| IRDMA_ERR_NVM_BLANK_MODE = -45, | ||
| IRDMA_ERR_NOT_IMPL = -46, | ||
| IRDMA_ERR_PE_DOORBELL_NOT_ENA = -47, | ||
| IRDMA_ERR_NOT_READY = -48, | ||
| IRDMA_NOT_SUPPORTED = -49, | ||
| IRDMA_ERR_FIRMWARE_API_VER = -50, | ||
| IRDMA_ERR_RING_FULL = -51, | ||
| IRDMA_ERR_MPA_CRC = -61, | ||
| IRDMA_ERR_NO_TXBUFS = -62, | ||
| IRDMA_ERR_SEQ_NUM = -63, | ||
| IRDMA_ERR_list_empty = -64, | ||
| IRDMA_ERR_INVALID_MAC_ADDR = -65, | ||
| IRDMA_ERR_BAD_STAG = -66, | ||
| IRDMA_ERR_CQ_COMPL_ERROR = -67, | ||
| IRDMA_ERR_Q_DESTROYED = -68, | ||
| IRDMA_ERR_INVALID_FEAT_CNT = -69, | ||
| IRDMA_ERR_REG_CQ_FULL = -70, | ||
| IRDMA_ERR_VF_MSG_ERROR = -71, | ||
| IRDMA_ERR_NO_INTR = -72, | ||
| IRDMA_ERR_REG_QSET = -73, | ||
| }; | ||
| #endif /* IRDMA_STATUS_H */ |
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