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arm64: dts: meson: g12b: w400: fix PHY deassert timing requirements
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According to the datasheet (Rev. 1.9) the RTL8211F requires at least
72ms "for internal circuits settling time" before accessing the PHY
egisters. On similar boards with the same PHY this fixes an issue where
Ethernet link would not come up when using ip link set down/up.

Fixes: 2cd2310 ("arm64: dts: meson-g12b-ugoos-am6: add initial device-tree")
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/46298e66572784c44f873f1b71cc4ab3d8fc5aa6.1607363522.git.stefan@agner.ch
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agners authored and khilman committed Dec 7, 2020
1 parent 3d07c3b commit 9e454e3
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi
Expand Up @@ -264,7 +264,7 @@
max-speed = <1000>;

reset-assert-us = <10000>;
reset-deassert-us = <30000>;
reset-deassert-us = <80000>;
reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;

interrupt-parent = <&gpio_intc>;
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