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debug-mmrs: Eliminate all traces of the USB_PHY_TEST MMR
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Interacting with the USB_PHY_TEST MMR through debugfs was causing wide-spread
chaos in the realm (kernel panic). Expunge all references to this demonic
register.

Signed-off-by: Andre Wolokita <Andre.Wolokita@analog.com>
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Andre Wolokita authored and realmz committed Apr 23, 2015
1 parent f7fee03 commit bb717b3
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Showing 7 changed files with 0 additions and 24 deletions.
1 change: 0 additions & 1 deletion arch/blackfin/kernel/debug-mmrs.c
Expand Up @@ -1620,7 +1620,6 @@ static int __init bfin_debug_mmrs_init(void)
D16(USB_APHY_CNTRL);
D16(USB_APHY_CALIB);
D16(USB_APHY_CNTRL2);
D16(USB_PHY_TEST);
D16(USB_PLLOSC_CTRL);
D16(USB_SRP_CLKDIV);
D16(USB_EP_NI0_TXMAXP);
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5 changes: 0 additions & 5 deletions arch/blackfin/mach-bf527/include/mach/cdefBF525.h
Expand Up @@ -122,11 +122,6 @@
#define bfin_read_USB_APHY_CNTRL2() bfin_read16(USB_APHY_CNTRL2)
#define bfin_write_USB_APHY_CNTRL2(val) bfin_write16(USB_APHY_CNTRL2, val)

/* (PHY_TEST is for ADI usage only) */

#define bfin_read_USB_PHY_TEST() bfin_read16(USB_PHY_TEST)
#define bfin_write_USB_PHY_TEST(val) bfin_write16(USB_PHY_TEST, val)

#define bfin_read_USB_PLLOSC_CTRL() bfin_read16(USB_PLLOSC_CTRL)
#define bfin_write_USB_PLLOSC_CTRL(val) bfin_write16(USB_PLLOSC_CTRL, val)
#define bfin_read_USB_SRP_CLKDIV() bfin_read16(USB_SRP_CLKDIV)
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4 changes: 0 additions & 4 deletions arch/blackfin/mach-bf527/include/mach/defBF525.h
Expand Up @@ -77,10 +77,6 @@

#define USB_APHY_CNTRL2 0xffc039e8 /* Register used to prevent re-enumeration once Moab goes into hibernate mode */

/* (PHY_TEST is for ADI usage only) */

#define USB_PHY_TEST 0xffc039ec /* Used for reducing simulation time and simplifies FIFO testability */

#define USB_PLLOSC_CTRL 0xffc039f0 /* Used to program different parameters for USB PLL and Oscillator */
#define USB_SRP_CLKDIV 0xffc039f4 /* Used to program clock divide value for the clock fed to the SRP detection logic */

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4 changes: 0 additions & 4 deletions arch/blackfin/mach-bf548/include/mach/cdefBF542.h
Expand Up @@ -241,10 +241,6 @@
#define bfin_read_USB_APHY_CNTRL2() bfin_read16(USB_APHY_CNTRL2)
#define bfin_write_USB_APHY_CNTRL2(val) bfin_write16(USB_APHY_CNTRL2, val)

/* (PHY_TEST is for ADI usage only) */

#define bfin_read_USB_PHY_TEST() bfin_read16(USB_PHY_TEST)
#define bfin_write_USB_PHY_TEST(val) bfin_write16(USB_PHY_TEST, val)
#define bfin_read_USB_PLLOSC_CTRL() bfin_read16(USB_PLLOSC_CTRL)
#define bfin_write_USB_PLLOSC_CTRL(val) bfin_write16(USB_PLLOSC_CTRL, val)
#define bfin_read_USB_SRP_CLKDIV() bfin_read16(USB_SRP_CLKDIV)
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4 changes: 0 additions & 4 deletions arch/blackfin/mach-bf548/include/mach/cdefBF547.h
Expand Up @@ -408,10 +408,6 @@
#define bfin_read_USB_APHY_CNTRL2() bfin_read16(USB_APHY_CNTRL2)
#define bfin_write_USB_APHY_CNTRL2(val) bfin_write16(USB_APHY_CNTRL2, val)

/* (PHY_TEST is for ADI usage only) */

#define bfin_read_USB_PHY_TEST() bfin_read16(USB_PHY_TEST)
#define bfin_write_USB_PHY_TEST(val) bfin_write16(USB_PHY_TEST, val)
#define bfin_read_USB_PLLOSC_CTRL() bfin_read16(USB_PLLOSC_CTRL)
#define bfin_write_USB_PLLOSC_CTRL(val) bfin_write16(USB_PLLOSC_CTRL, val)
#define bfin_read_USB_SRP_CLKDIV() bfin_read16(USB_SRP_CLKDIV)
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3 changes: 0 additions & 3 deletions arch/blackfin/mach-bf548/include/mach/defBF542.h
Expand Up @@ -140,9 +140,6 @@
#define USB_APHY_CALIB 0xffc03de4 /* Register used to set some calibration values */
#define USB_APHY_CNTRL2 0xffc03de8 /* Register used to prevent re-enumeration once Moab goes into hibernate mode */

/* (PHY_TEST is for ADI usage only) */

#define USB_PHY_TEST 0xffc03dec /* Used for reducing simulation time and simplifies FIFO testability */
#define USB_PLLOSC_CTRL 0xffc03df0 /* Used to program different parameters for USB PLL and Oscillator */
#define USB_SRP_CLKDIV 0xffc03df4 /* Used to program clock divide value for the clock fed to the SRP detection logic */

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3 changes: 0 additions & 3 deletions arch/blackfin/mach-bf548/include/mach/defBF547.h
Expand Up @@ -254,9 +254,6 @@
#define USB_APHY_CALIB 0xffc03de4 /* Register used to set some calibration values */
#define USB_APHY_CNTRL2 0xffc03de8 /* Register used to prevent re-enumeration once Moab goes into hibernate mode */

/* (PHY_TEST is for ADI usage only) */

#define USB_PHY_TEST 0xffc03dec /* Used for reducing simulation time and simplifies FIFO testability */
#define USB_PLLOSC_CTRL 0xffc03df0 /* Used to program different parameters for USB PLL and Oscillator */
#define USB_SRP_CLKDIV 0xffc03df4 /* Used to program clock divide value for the clock fed to the SRP detection logic */

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