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atomic: Provide atomic_{or,xor,and}
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Implement atomic logic ops -- atomic_{or,xor,and}.

These will replace the atomic_{set,clear}_mask functions that are
available on some archs.

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Peter Zijlstra authored and Thomas Gleixner committed Jul 27, 2015
1 parent 2957c03 commit e6942b7
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Showing 29 changed files with 19 additions and 68 deletions.
1 change: 0 additions & 1 deletion arch/alpha/include/asm/atomic.h
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Expand Up @@ -110,7 +110,6 @@ static __inline__ long atomic64_##op##_return(long i, atomic64_t * v) \
ATOMIC_OPS(add)
ATOMIC_OPS(sub)

#define CONFIG_ARCH_HAS_ATOMIC_OR
#define atomic_andnot atomic_andnot
#define atomic64_andnot atomic64_andnot

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1 change: 0 additions & 1 deletion arch/arc/include/asm/atomic.h
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Expand Up @@ -144,7 +144,6 @@ static inline int atomic_##op##_return(int i, atomic_t *v) \
ATOMIC_OPS(add, +=, add)
ATOMIC_OPS(sub, -=, sub)

#define CONFIG_ARCH_HAS_ATOMIC_OR
#define atomic_andnot atomic_andnot

ATOMIC_OP(and, &=, and)
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1 change: 0 additions & 1 deletion arch/arm/include/asm/atomic.h
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Expand Up @@ -194,7 +194,6 @@ static inline int __atomic_add_unless(atomic_t *v, int a, int u)
ATOMIC_OPS(add, +=, add)
ATOMIC_OPS(sub, -=, sub)

#define CONFIG_ARCH_HAS_ATOMIC_OR
#define atomic_andnot atomic_andnot

ATOMIC_OP(and, &=, and)
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1 change: 0 additions & 1 deletion arch/arm64/include/asm/atomic.h
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Expand Up @@ -85,7 +85,6 @@ static inline int atomic_##op##_return(int i, atomic_t *v) \
ATOMIC_OPS(add, add)
ATOMIC_OPS(sub, sub)

#define CONFIG_ARCH_HAS_ATOMIC_OR
#define atomic_andnot atomic_andnot

ATOMIC_OP(and, and)
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2 changes: 0 additions & 2 deletions arch/avr32/include/asm/atomic.h
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Expand Up @@ -51,8 +51,6 @@ static inline void atomic_##op(int i, atomic_t *v) \
(void)__atomic_##op##_return(i, v); \
}

#define CONFIG_ARCH_HAS_ATOMIC_OR

ATOMIC_OP(and, and)
ATOMIC_OP(or, or)
ATOMIC_OP(xor, eor)
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2 changes: 0 additions & 2 deletions arch/blackfin/include/asm/atomic.h
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Expand Up @@ -28,8 +28,6 @@ asmlinkage int __raw_atomic_test_asm(const volatile int *ptr, int value);
#define atomic_add_return(i, v) __raw_atomic_add_asm(&(v)->counter, i)
#define atomic_sub_return(i, v) __raw_atomic_add_asm(&(v)->counter, -(i))

#define CONFIG_ARCH_HAS_ATOMIC_OR

#define atomic_or(i, v) (void)__raw_atomic_or_asm(&(v)->counter, i)
#define atomic_and(i, v) (void)__raw_atomic_and_asm(&(v)->counter, i)
#define atomic_xor(i, v) (void)__raw_atomic_xor_asm(&(v)->counter, i)
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2 changes: 0 additions & 2 deletions arch/frv/include/asm/atomic.h
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Expand Up @@ -192,8 +192,6 @@ static inline void atomic64_##op(long long i, atomic64_t *v) \
(void)__atomic64_fetch_##op(i, &v->counter); \
}

#define CONFIG_ARCH_HAS_ATOMIC_OR

ATOMIC_OP(or)
ATOMIC_OP(and)
ATOMIC_OP(xor)
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2 changes: 0 additions & 2 deletions arch/h8300/include/asm/atomic.h
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Expand Up @@ -41,8 +41,6 @@ static inline void atomic_##op(int i, atomic_t *v) \
ATOMIC_OP_RETURN(add, +=)
ATOMIC_OP_RETURN(sub, -=)

#define CONFIG_ARCH_HAS_ATOMIC_OR

ATOMIC_OP(and, &=)
ATOMIC_OP(or, |=)
ATOMIC_OP(xor, ^=)
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2 changes: 0 additions & 2 deletions arch/hexagon/include/asm/atomic.h
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Expand Up @@ -132,8 +132,6 @@ static inline int atomic_##op##_return(int i, atomic_t *v) \
ATOMIC_OPS(add)
ATOMIC_OPS(sub)

#define CONFIG_ARCH_HAS_ATOMIC_OR

ATOMIC_OP(and)
ATOMIC_OP(or)
ATOMIC_OP(xor)
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2 changes: 0 additions & 2 deletions arch/ia64/include/asm/atomic.h
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Expand Up @@ -69,8 +69,6 @@ ATOMIC_OP(sub, -)
: ia64_atomic_sub(__ia64_asr_i, v); \
})

#define CONFIG_ARCH_HAS_ATOMIC_OR

ATOMIC_OP(and, &)
ATOMIC_OP(or, |)
ATOMIC_OP(xor, ^)
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2 changes: 0 additions & 2 deletions arch/m32r/include/asm/atomic.h
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Expand Up @@ -94,8 +94,6 @@ static __inline__ int atomic_##op##_return(int i, atomic_t *v) \
ATOMIC_OPS(add)
ATOMIC_OPS(sub)

#define CONFIG_ARCH_HAS_ATOMIC_OR

ATOMIC_OP(and)
ATOMIC_OP(or)
ATOMIC_OP(xor)
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2 changes: 0 additions & 2 deletions arch/m68k/include/asm/atomic.h
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Expand Up @@ -77,8 +77,6 @@ static inline int atomic_##op##_return(int i, atomic_t * v) \
ATOMIC_OPS(add, +=, add)
ATOMIC_OPS(sub, -=, sub)

#define CONFIG_ARCH_HAS_ATOMIC_OR

ATOMIC_OP(and, &=, and)
ATOMIC_OP(or, |=, or)
ATOMIC_OP(xor, ^=, eor)
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2 changes: 0 additions & 2 deletions arch/metag/include/asm/atomic_lnkget.h
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Expand Up @@ -74,8 +74,6 @@ static inline int atomic_##op##_return(int i, atomic_t *v) \
ATOMIC_OPS(add)
ATOMIC_OPS(sub)

#define CONFIG_ARCH_HAS_ATOMIC_OR

ATOMIC_OP(and)
ATOMIC_OP(or)
ATOMIC_OP(xor)
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2 changes: 0 additions & 2 deletions arch/mips/include/asm/atomic.h
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Expand Up @@ -137,8 +137,6 @@ static __inline__ int atomic_##op##_return(int i, atomic_t * v) \
ATOMIC_OPS(add, +=, addu)
ATOMIC_OPS(sub, -=, subu)

#define CONFIG_ARCH_HAS_ATOMIC_OR

ATOMIC_OP(and, &=, and)
ATOMIC_OP(or, |=, or)
ATOMIC_OP(xor, ^=, xor)
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2 changes: 0 additions & 2 deletions arch/mn10300/include/asm/atomic.h
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Expand Up @@ -89,8 +89,6 @@ static inline int atomic_##op##_return(int i, atomic_t *v) \
ATOMIC_OPS(add)
ATOMIC_OPS(sub)

#define CONFIG_ARCH_HAS_ATOMIC_OR

ATOMIC_OP(and)
ATOMIC_OP(or)
ATOMIC_OP(xor)
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2 changes: 0 additions & 2 deletions arch/parisc/include/asm/atomic.h
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Expand Up @@ -126,8 +126,6 @@ static __inline__ int atomic_##op##_return(int i, atomic_t *v) \
ATOMIC_OPS(add, +=)
ATOMIC_OPS(sub, -=)

#define CONFIG_ARCH_HAS_ATOMIC_OR

ATOMIC_OP(and, &=)
ATOMIC_OP(or, |=)
ATOMIC_OP(xor, ^=)
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2 changes: 0 additions & 2 deletions arch/powerpc/include/asm/atomic.h
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Expand Up @@ -67,8 +67,6 @@ static __inline__ int atomic_##op##_return(int a, atomic_t *v) \
ATOMIC_OPS(add, add)
ATOMIC_OPS(sub, subf)

#define CONFIG_ARCH_HAS_ATOMIC_OR

ATOMIC_OP(and, and)
ATOMIC_OP(or, or)
ATOMIC_OP(xor, xor)
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2 changes: 0 additions & 2 deletions arch/s390/include/asm/atomic.h
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Expand Up @@ -282,8 +282,6 @@ static inline void atomic64_##op(long i, atomic64_t *v) \
__ATOMIC64_LOOP(v, i, __ATOMIC64_##OP, __ATOMIC64_NO_BARRIER); \
}

#define CONFIG_ARCH_HAS_ATOMIC_OR

ATOMIC64_OP(and, AND)
ATOMIC64_OP(or, OR)
ATOMIC64_OP(xor, XOR)
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2 changes: 0 additions & 2 deletions arch/sh/include/asm/atomic-grb.h
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Expand Up @@ -48,8 +48,6 @@ static inline int atomic_##op##_return(int i, atomic_t *v) \
ATOMIC_OPS(add)
ATOMIC_OPS(sub)

#define CONFIG_ARCH_HAS_ATOMIC_OR

ATOMIC_OP(and)
ATOMIC_OP(or)
ATOMIC_OP(xor)
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2 changes: 0 additions & 2 deletions arch/sparc/include/asm/atomic_32.h
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Expand Up @@ -17,8 +17,6 @@
#include <asm/barrier.h>
#include <asm-generic/atomic64.h>

#define CONFIG_ARCH_HAS_ATOMIC_OR

#define ATOMIC_INIT(i) { (i) }

int atomic_add_return(int, atomic_t *);
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2 changes: 0 additions & 2 deletions arch/sparc/include/asm/atomic_64.h
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Expand Up @@ -33,8 +33,6 @@ long atomic64_##op##_return(long, atomic64_t *);
ATOMIC_OPS(add)
ATOMIC_OPS(sub)

#define CONFIG_ARCH_HAS_ATOMIC_OR

ATOMIC_OP(and)
ATOMIC_OP(or)
ATOMIC_OP(xor)
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2 changes: 0 additions & 2 deletions arch/tile/include/asm/atomic_32.h
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Expand Up @@ -41,8 +41,6 @@ static inline void atomic_##op(int i, atomic_t *v) \
_atomic_##op((unsigned long *)&v->counter, i); \
}

#define CONFIG_ARCH_HAS_ATOMIC_OR

ATOMIC_OP(and)
ATOMIC_OP(or)
ATOMIC_OP(xor)
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2 changes: 0 additions & 2 deletions arch/tile/include/asm/atomic_64.h
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Expand Up @@ -58,8 +58,6 @@ static inline int __atomic_add_unless(atomic_t *v, int a, int u)
return oldval;
}

#define CONFIG_ARCH_HAS_ATOMIC_OR

static inline void atomic_and(int i, atomic_t *v)
{
__insn_fetchand4((void *)&v->counter, i);
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2 changes: 0 additions & 2 deletions arch/x86/include/asm/atomic.h
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Expand Up @@ -191,8 +191,6 @@ static inline void atomic_##op(int i, atomic_t *v) \
: "memory"); \
}

#define CONFIG_ARCH_HAS_ATOMIC_OR

ATOMIC_OP(and)
ATOMIC_OP(or)
ATOMIC_OP(xor)
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2 changes: 0 additions & 2 deletions arch/xtensa/include/asm/atomic.h
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Expand Up @@ -145,8 +145,6 @@ static inline int atomic_##op##_return(int i, atomic_t * v) \
ATOMIC_OPS(add)
ATOMIC_OPS(sub)

#define CONFIG_ARCH_HAS_ATOMIC_OR

ATOMIC_OP(and)
ATOMIC_OP(or)
ATOMIC_OP(xor)
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21 changes: 12 additions & 9 deletions include/asm-generic/atomic.h
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Expand Up @@ -102,24 +102,27 @@ ATOMIC_OP_RETURN(sub, -)
ATOMIC_OP(and, &)
#endif

#ifndef atomic_clear_mask
#define atomic_clear_mask(i, v) atomic_and(~(i), (v))
#endif

#ifndef atomic_or
#ifndef CONFIG_ARCH_HAS_ATOMIC_OR
#define CONFIG_ARCH_HAS_ATOMIC_OR
#endif
ATOMIC_OP(or, |)
#endif

#ifndef atomic_set_mask
#define atomic_set_mask(i, v) atomic_or((i), (v))
#ifndef atomic_xor
ATOMIC_OP(xor, ^)
#endif

#undef ATOMIC_OP_RETURN
#undef ATOMIC_OP

static inline __deprecated void atomic_clear_mask(unsigned int mask, atomic_t *v)
{
atomic_and(~mask, v);
}

static inline __deprecated void atomic_set_mask(unsigned int mask, atomic_t *v)
{
atomic_or(mask, v);
}

/*
* Atomic operations that C can't guarantee us. Useful for
* resource counting etc..
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4 changes: 4 additions & 0 deletions include/asm-generic/atomic64.h
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Expand Up @@ -32,6 +32,10 @@ extern long long atomic64_##op##_return(long long a, atomic64_t *v);
ATOMIC64_OPS(add)
ATOMIC64_OPS(sub)

ATOMIC64_OP(and)
ATOMIC64_OP(or)
ATOMIC64_OP(xor)

#undef ATOMIC64_OPS
#undef ATOMIC64_OP_RETURN
#undef ATOMIC64_OP
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13 changes: 0 additions & 13 deletions include/linux/atomic.h
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Expand Up @@ -111,19 +111,6 @@ static inline int atomic_dec_if_positive(atomic_t *v)
}
#endif

#ifndef CONFIG_ARCH_HAS_ATOMIC_OR
static inline void atomic_or(int i, atomic_t *v)
{
int old;
int new;

do {
old = atomic_read(v);
new = old | i;
} while (atomic_cmpxchg(v, old, new) != old);
}
#endif /* #ifndef CONFIG_ARCH_HAS_ATOMIC_OR */

#include <asm-generic/atomic-long.h>
#ifdef CONFIG_GENERIC_ATOMIC64
#include <asm-generic/atomic64.h>
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3 changes: 3 additions & 0 deletions lib/atomic64.c
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Expand Up @@ -102,6 +102,9 @@ EXPORT_SYMBOL(atomic64_##op##_return);

ATOMIC64_OPS(add, +=)
ATOMIC64_OPS(sub, -=)
ATOMIC64_OP(and, &=)
ATOMIC64_OP(or, |=)
ATOMIC64_OP(xor, ^=)

#undef ATOMIC64_OPS
#undef ATOMIC64_OP_RETURN
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